A display may include an array of pixels. Each pixel in the array may include a drive transistor, emission transistors, a data loading transistor, a gate voltage setting transistor, an initialization transistor, an anode reset transistor, a storage capacitor, and an optional current boosting capacitor. A data refresh may include a initialization phase, a threshold voltage sampling phase, and a data programming phase. The threshold voltage sampling phase can be substantially longer than the data programming phase to decrease a current sampling level during the threshold voltage sampling phase, which helps reduce the display luminance sensitivity to temperature variations.

A display may include an array of pixels. Each pixel in the array may include a drive transistor, emission transistors, a data loading transistor, a gate voltage setting transistor, an initialization transistor, an anode reset transistor, a storage capacitor, and an optional current boosting capacitor. A data refresh may include a initialization phase, a threshold voltage sampling phase, and a data programming phase. The threshold voltage sampling phase can be substantially longer than the data programming phase to decrease a current sampling level during the threshold voltage sampling phase, which helps reduce the display luminance sensitivity to temperature variations.

A pixel driving circuit includes a reset sub-circuit, a compensation sub-circuit, a light-emitting control sub-circuit and a driving sub-circuit. The reset sub-circuit is configured to transmit an initialization signal received from an initialization signal terminal to the light-emitting control sub-circuit. The fight-emitting control sub-circuit is configured to transmit the initialization signal to the first node. The compensation sub-circuit is configured to transmit the initialization signal from the first node to a second node so as to reset a voltage of the second node. The driving sub-circuit is configured to open a conductive path from a first voltage signal terminal to the initialization signal terminal during a process of resetting the voltage of the second node.

The present invention provides a shift register unit, a driving method, a driving circuit and a driving device. The shift register unit includes a first input circuit, a second input circuit, a control circuit and an output circuit; the first input circuit provides an input signal to a first node and provides a second voltage signal to a third node under control of a second clock signal; the second input circuit outputs a first voltage signal to the third node and controls a potential at a fourth node under control of a potential at the first node and an input control signal; the control circuit provides a first voltage signal to the first node under control of a potential at a fourth node. The present invention provides waveforms for operation of specific pixels.

A display device includes: a display panel including a display area including pixels and a non-display area including a dummy pixel; a scan driver which supplies a scan signal to the display panel; a data driver which supplies a data signal to the display panel; and a timing controller which supplies a first control signal for controlling the scan driver and a second control signal for controlling the data driver. The dummy pixel is connected to a bad pixel among the pixels in the display area through a repair line, and a connection of the dummy pixel to the repair line is cut off in an initialization phase in which a voltage of an initialization power source is supplied.

A display device includes: a display panel including a display area including pixels and a non-display area including a dummy pixel; a scan driver which supplies a scan signal to the display panel; a data driver which supplies a data signal to the display panel; and a timing controller which supplies a first control signal for controlling the scan driver and a second control signal for controlling the data driver. The dummy pixel is connected to a bad pixel among the pixels in the display area through a repair line, and a connection of the dummy pixel to the repair line is cut off in an initialization phase in which a voltage of an initialization power source is supplied.

A pixel includes a first capacitor connected between first and second nodes, a second capacitor connected between a first voltage line and the first node, a light emitting diode including a first electrode and a second electrode connected with a second voltage line, a first transistor including a first electrode, a second electrode, and a gate electrode connected with the second node, a second transistor including a first electrode, a second electrode, and a gate electrode which receives a scan signal, a third transistor including a first electrode, a second electrode, and a gate electrode which receives a first compensation scan signal, a fourth transistor including a first electrode, a second electrode, and a gate electrode which receives a second compensation scan signal, and a fifth transistor including a first electrode, a second electrode, and a gate electrode which receives a first light emitting signal.

A pixel of an OLED display device includes a capacitor coupled between first and second nodes, first and second transistors, each including a gate receiving a respective initialization signal, a first terminal receiving a first power supply voltage, and a second terminal coupled to the capacitor, a third transistor including a first terminal coupled to a data line and a second terminal coupled to the first node, a fourth transistor including a gate coupled to the second node, a first terminal receiving the first power supply voltage, and a second terminal coupled to a third node, a fifth transistor including a first terminal coupled to the third node and a second terminal coupled to the second node, sixth and seventh transistors receiving a scan signal, eighth and ninth transistors receiving an emission signal, and an OLED.

A pixel of an OLED display device includes a capacitor coupled between first and second nodes, first and second transistors, each including a gate receiving a respective initialization signal, a first terminal receiving a first power supply voltage, and a second terminal coupled to the capacitor, a third transistor including a first terminal coupled to a data line and a second terminal coupled to the first node, a fourth transistor including a gate coupled to the second node, a first terminal receiving the first power supply voltage, and a second terminal coupled to a third node, a fifth transistor including a first terminal coupled to the third node and a second terminal coupled to the second node, sixth and seventh transistors receiving a scan signal, eighth and ninth transistors receiving an emission signal, and an OLED.

The present application discloses a current-driven display device capable of providing satisfactory display without flickering even when pause drive is performed. In a pixel circuit 15, a first initialization transistor T4 initializes a gate voltage Vg, and thereafter a voltage on a data signal line Di is written to a holding capacitor Cst via a write control transistor T2 and a drive transistor T1. Thereafter, emission control transistors T5 and T6 are turned on, so that a drive current I1 from the drive transistor T1 causes an organic EL element OL to emit light. During this emission period, even if the gate voltage Vg is decreased due to a leakage current through the first initialization transistor T4 in an OFF state, the decrease is compensated for by increasing a threshold control voltage being provided to a threshold control terminal TG of the drive transistor T1. Thus, even if the pause drive results in a long refresh cycle, it is possible to inhibit an increase in luminance due to the decrease in the gate voltage Vg and thereby prevent the occurrence of flickering.