Embodiments of the disclosure relate to an organic light emitting display panel and an organic light emitting display device including the same, and more specifically, to an organic light emitting display panel and an organic light emitting display device which include: an insulation film with at least one concave portion including a flat portion and an inclined portion surrounding the flat portion in at least one subpixel, a first electrode disposed on the concave portion, an organic layer disposed on the first electrode, a second electrode disposed on the organic layer, an encapsulation layer disposed on the second electrode, and at least one structure disposed on the encapsulation layer, overlapping at least one light emitting area, and having at least a side surface where a light reflecting member is disposed, thereby enhancing light extraction efficiency.

A display panel includes a displaying area including pixels, a non-displaying area including a dummy pixel, and a switching circuit to transfer a data signal to the dummy pixel in response to a control signal. The display panel may compensate for defective pixels located in different data lines using only one dummy pixel column and may minimize an area (e.g., a dead space) including the dummy pixel column by including a distributor buffering a signal of an output line and a switching circuit selecting/providing a portion of a signal of the output line to a dummy data line.

A display panel includes a displaying area including pixels, a non-displaying area including a dummy pixel, and a switching circuit to transfer a data signal to the dummy pixel in response to a control signal. The display panel may compensate for defective pixels located in different data lines using only one dummy pixel column and may minimize an area (e.g., a dead space) including the dummy pixel column by including a distributor buffering a signal of an output line and a switching circuit selecting/providing a portion of a signal of the output line to a dummy data line.

A display substrate and a display apparatus are disclosed. The display substrate includes a display region and a peripheral region, the peripheral region includes a circuit region, and the display region includes a plurality of sub-pixels, a plurality of data lines extending along a first direction and a plurality of gate lines extending along a second direction crossing the first direction. The circuit region includes a plurality of driving unit groups. The circuit region includes a first sub-region and a second sub-region that are opposite to each other at two sides of the display region along the first direction, the first sub-region includes a plurality of multiplexing unit groups and the second sub-region includes a plurality of test unit groups.

An electronic device includes a first source group and a second source group, each of which includes a plurality of source channels, and a gamma block that receives first to 2i-th initial voltages (i being an integer of 1 or more), outputs first to 2i-th intermediate voltages by amplifying the first to i-th initial voltages, and outputs first to i-th gamma voltages to the first source group by buffering the first to 2i-th intermediate voltages, and a first buffer block that receives the first to 2i-th intermediate voltages from the gamma block and buffers the first to 2i-th intermediate voltages so as to be output to the second source group, and the gamma block may include a first resistor string including a plurality of resistors connected between nodes from which the first to i-th gamma voltages are output.

An electronic device includes a first source group and a second source group, each of which includes a plurality of source channels, and a gamma block that receives first to 2i-th initial voltages (i being an integer of 1 or more), outputs first to 2i-th intermediate voltages by amplifying the first to i-th initial voltages, and outputs first to i-th gamma voltages to the first source group by buffering the first to 2i-th intermediate voltages, and a first buffer block that receives the first to 2i-th intermediate voltages from the gamma block and buffers the first to 2i-th intermediate voltages so as to be output to the second source group, and the gamma block may include a first resistor string including a plurality of resistors connected between nodes from which the first to i-th gamma voltages are output.

A display device includes a display panel including pixels, and data lines and gate lines connected to the pixels, a timing controller configured to output source driving bit information and gate driving bit information through an intra-interface signal, a source driver configured to generate data driving signal based on the source driving bit information and to supply the data driving signal to the data lines, and a gate driver configured to generate a gate driving signal based on the gate driving bit information and to supply the gate driving signal to the gate lines, wherein the intra-interface signal is configured with predetermined data transmission units and includes both the source driving bit information and the gate driving bit information every 1 data transmission unit.

A display device includes a display panel including pixels, and data lines and gate lines connected to the pixels, a timing controller configured to output source driving bit information and gate driving bit information through an intra-interface signal, a source driver configured to generate data driving signal based on the source driving bit information and to supply the data driving signal to the data lines, and a gate driver configured to generate a gate driving signal based on the gate driving bit information and to supply the gate driving signal to the gate lines, wherein the intra-interface signal is configured with predetermined data transmission units and includes both the source driving bit information and the gate driving bit information every 1 data transmission unit.

A display device includes a display panel, a data driver which provides data voltages to the display panel, and a controller which provides output image data to the data driver. The controller includes a data line memory which stores input image data for each pixel row of the display panel, an address line memory which stores addresses for the input image data, and a data serialize block which generates the output image data provided to the data driver by rearranging the input image data stored in the data line memory based on the addresses stored in the address line memory.

A display device includes a display panel, a data driver which provides data voltages to the display panel, and a controller which provides output image data to the data driver. The controller includes a data line memory which stores input image data for each pixel row of the display panel, an address line memory which stores addresses for the input image data, and a data serialize block which generates the output image data provided to the data driver by rearranging the input image data stored in the data line memory based on the addresses stored in the address line memory.