A display device includes a backlight unit including a plurality of light emitting blocks, a first controller configured to generate first block representative value information for first pixel blocks based on first image data, and a second controller configured to generate second block representative value information for second pixel blocks based on second image data. The first controller receives the second block representative value information from the second controller, and the second controller receives the first block representative value information from the first controller. The first and second controllers generate duty information for the plurality of light emitting blocks based on the first and second block representative value information, and generate light profile information of the backlight unit. The first controller compensates the first image data based on the light profile information, and the second controller compensates the second image data based on the light profile information.

The present technology relates to an image processing apparatus, an image processing method, and a surgical system, by which a captured image can be displayed with low latency in almost real time. A DMA controller 51 of a CPU 31 divides image data, which is input via an IF card 34, by the number of GPU cards 35-1, 35-2 in a horizontal direction and allocates them. In each of the GPU cards 35-1, 35-2, the image data is subjected to time division processing in the vertical direction. With this, the use of the plurality of GPU cards 35-1, 35-2 increases the speed of processing associated with display for the image data. High-speed display is realized due to reduction in latency. The present technology is applicable to an endoscopic camera, a surgical microscope, and the like.

Image processing device comprises a maximum luminance setting unit that associates a maximum luminance value included in a corresponding area of a luminance image with each of a plurality of areas obtained by classifying a display area of a second liquid crystal panel into multiple areas to include an overlapping area overlapping a plurality of first pixels of a first liquid crystal panel for one pixel, an order setting unit that sets the order of the plurality of areas in descending order of maximum luminance values, and a transmittance setting unit that sets the transmittance of the pixel of interest based on the maximum luminance value are provided. The transmittance setting unit sets the transmittance of the pixel of interest based on a transmittance coefficient indicating a proportion at which each of the plurality of first pixels overlapping the overlapping area influences the overlapping area with transmitted light.

According to one embodiment, a display device which includes a plurality of signal line drivers which drive a display area of a display panel by dividing the display area into a plurality of division display areas is provided. The plurality of signal line drivers include a master signal line driver and a slave signal line diver. Each of the master signal line driver and the slave signal line driver drives at least one of the division display areas. An outward path outputs a direct-current voltage from the master signal line driver to the slave signal line driver. A return path is electrically connected to and is contiguous with the outward path, and returns the direct-current voltage to the master signal line driver.

A liquid crystal display device and a method for driving the liquid crystal display device are provided. The liquid crystal display device includes a liquid crystal display panel and a driving circuit. The liquid crystal display panel includes multiple liquid crystal display pixels disposed in a matrix. The liquid crystal display device is configured to display a same picture in two successive frames. The driving circuit is configured to apply pixel voltages to each of the multiple liquid crystal display pixels separately in the two successive frames so that liquid crystal molecules of each of the multiple liquid crystal display pixels are rotated. In each of the two successive frames, a voltage value of a pixel voltage of each liquid crystal display pixel is different from that of adjacent liquid crystal display pixels. Pixel voltages of a same liquid crystal display pixel in a preceding one frame and in a succeeding frame have a same polarity and different voltage values.

A liquid crystal display, comprising a liquid crystal panel (10) and a driving module (20). The liquid crystal panel (10) comprises a plurality of liquid crystal pixels arranged in an array. The liquid crystal display is configured to display a same picture in two adjacent frames. The driving module (20) is used for respectively providing different pixel voltages of the same polarity to each liquid crystal pixel in two adjacent frames to deflect liquid crystal molecules of the liquid crystal pixel, wherein in each of the two adjacent frames, the pixel voltage of each liquid crystal pixel is different from pixel voltages of liquid crystal pixels which are spaced apart from the liquid crystal pixel by one pixel along a first direction, a second direction, a third direction, and a fourth direction. Also provided is a method for driving the liquid crystal display.

Disclosed is a liquid crystal display, comprising a liquid crystal panel 10 and a driving module 20. The liquid crystal panel 10 comprises a plurality of liquid crystal pixels P.sub.ab arranged in an array. The liquid crystal display is configured to display the same picture in two frames separated by one frame. The driving module 20 is used for separately providing different pixel voltages of the same polarity to each liquid crystal pixel in the two frames separated by one frame, so as to deflect liquid crystal molecules of each liquid crystal pixel. In each of the two frames separated by one frame, the pixel voltage of each liquid crystal pixel is different from the pixel voltages of adjacent liquid crystal pixels around. Also disclosed is a method for driving a liquid crystal display.

The present technology relates to an image processing apparatus, an image processing method, and a surgical system, by which a captured image can be displayed with low latency in almost real time. A DMA controller 51 of a CPU 31 divides image data, which is input via an IF card 34, by the number of GPU cards 35-1, 35-2 in a horizontal direction and allocates them. In each of the GPU cards 35-1, 35-2, the image data is subjected to time division processing in the vertical direction. With this, the use of the plurality of GPU cards 35-1, 35-2 increases the speed of processing associated with display for the image data. High-speed display is realized due to reduction in latency. The present technology is applicable to an endoscopic camera, a surgical microscope, and the like.

A display panel includes a substrate including a first area and a second area, a gate driver configured to supply a gate signal to pixels disposed on the substrate, a plurality of stages constituting the gate driver, and a first clock signal line and a second clock signal line to be respectively applied with a first clock signal and a second clock signal having the same phase. The plurality of stages are connected to the first area and the second area and driven at the same time. The first clock signal line and the second clock signal line are connected to each of the plurality of stages connected to the first area and the second area.

A liquid crystal display device includes a liquid crystal panel including a plurality of liquid crystal pixels, wherein the liquid crystal panel is configured to display a same picture in two adjacent frames; a driving module disposed on the non-display area, wherein the driving module is used to respectively provide each liquid crystal pixel with a same polarity pixel voltage of different levels in the two adjacent frames so as to deflect liquid crystal molecules of each liquid crystal pixel, and in each frame of the two adjacent frames, the level of the pixel voltage of each liquid crystal pixel is different from the level of the pixel voltage of the adjacent liquid crystal pixels in front, back, left or right.