The present invention provides a brightness compensation method of a Mura area and a design method of a Mura pixel dot brightness. By searching the right and lower normal pixel dots which are closest to the designated Mura pixel dot, and respectively recording the brightnesses of the right and lower normal pixel dots, and the distances between the right and lower normal pixel dots and the designated pixel dot, with combination of the brightnesses of the left and upper normal pixel dots adjacent to the designated Mura pixel dot, the weighted operation is executed to the brightnesses of the normal pixel dots at the right side, the lower side, the left side and the upper side to obtain the ideal brightness of the designated Mura pixel dot, and replace the original brightness of the designated Mura pixel dot with the obtained ideal brightness. Then, the brightness compensation of the Mura area is accomplished. The brightness of the Mura area after compensation is smoothly transited.

An array substrate and a display device are disclosed. The present disclosure relates to the technical field of display, whereby the technical problem that the uniformity of the image of the liquid crystal display panel is affected by the distortion of the source driving signal can be solved.

An electronic shelf label that includes a casing, a display arranged in the casing, a printed circuit board, enclosed by the casing, a power source, and a thermal element arranged within the casing.

Optical systems are described that include a switchable diffuser, a display panel, a lighting component and a diffuser controller. The diffuser controller is configured to switch the state of the switchable diffuser when the diffuser controller determines that the diffuser state is to be changed. The diffuser controller may be configured to vary an output level of the display panel in association with a change in state of the switchable diffuser. The optical system may also include a switching device which may be separable from the display panel.

According to one embodiment, a display device which includes a plurality of signal line drivers which drive a display area of a display panel by dividing the display area into a plurality of division display areas is provided. The plurality of signal line drivers include a master signal line driver and a slave signal line diver. Each of the master signal line driver and the slave signal line driver drives at least one of the division display areas. An outward path outputs a direct-current voltage from the master signal line driver to the slave signal line driver. A return path is electrically connected to and is contiguous with the outward path, and returns the direct-current voltage to the master signal line driver.

The present technology relates to an image processing apparatus, an image processing method, and a surgical system, by which a captured image can be displayed with low latency in almost real time. A DMA controller 51 of a CPU 31 divides image data, which is input via an IF card 34, by the number of GPU cards 35-1, 35-2 in a horizontal direction and allocates them. In each of the GPU cards 35-1, 35-2, the image data is subjected to time division processing in the vertical direction. With this, the use of the plurality of GPU cards 35-1, 35-2 increases the speed of processing associated with display for the image data. High-speed display is realized due to reduction in latency. The present technology is applicable to an endoscopic camera, a surgical microscope, and the like.