A method of driving a display panel includes outputting a gate signal to a gate line of the display panel in response to a first control signal and outputting a data voltage to a data line of the display panel in response to a second control signal using a plurality of data output blocks having driving timings different from one another. A single driving chip includes the plurality of data output blocks.

A method of driving a display panel is provided. The method includes generating first compensated and second compensated data based on input image data, outputting the first compensated data to a data driver during a first frame, outputting the first smoothing data to the data driver during a second frame subsequent to the first frame, and outputting the second compensated data to the data driver during an n-th frame subsequent to the second frame (where n is a natural number greater than two). The first smoothing data has a value between a value of the first compensated data and a value of the second compensated data.

A method of driving a display panel includes comparing a previous line data and a present line data to generate a charge sharing enable (EQ) signal indicating whether or not a charge sharing is to be applied to a pixel; selectively applying the charge sharing to the present line data utilizing a charge sharing voltage according to the EQ signal to generate a data voltage; and outputting the data voltage to the pixel.

A tiling device with a driving method having a low number of data pins is provided. The tiling device includes a first substrate, a second substrate and a data driving circuit. The first substrate includes a plurality of first semiconductor units. The second substrate includes a plurality of second semiconductor units. The data driving circuit simultaneously provides first data signals to the plurality of first semiconductor units and the plurality of second semiconductor units, and simultaneously provides second data signals to the plurality of first semiconductor units and the plurality of second semiconductor units.

The present invention relates to an area-saving driving circuit for a display panel, which comprises a plurality of digital-to-analog converting circuits convert input data, respectively, and produce a pixel signal. A plurality of driving units are coupled to the plurality of digital-to-analog converting circuits, respectively. They produce a driving signal according to the pixel signal and transmit the driving signal to the display panel for displaying. A plurality of voltage booster units are coupled to the plurality of driving units, respectively, and produce a supply voltage according to a control signal. Then the supply voltage is provided to the plurality of driving units. Thereby, by providing the supply voltage to the plurality of driving units of the display panel by means of the plurality of voltage booster units, the area of the external storage capacitor is reduced. Alternative, the external storage capacitor can be even not required.

The present invention provides a demultiplex type display driving circuit, including: a plurality of drive units. Each drive unit comprises three demultiplex modules, and each demultiplex module includes two switch elements. The first switch element and the second switch element are controlled to be alternately on with the first branch control signal and the second branch control signal. The third branch control signal controls the two switch elements of the second and the third demultiplex modules to be alternately on to sequentially input the data signal to the first, the second, the third and the fourth data lines. Thus, division one to four of the data signal can be achieved with the three branch control signals. In comparison with prior art, the amount of the branch control signals is decreased, and meanwhile, the CMOS transmission gate is employed to be the switch element in the demultiplex modules.

A liquid crystal display device includes a plurality of data lines; a plurality of gate lines and a pixel array including a plurality of subpixels formed of first-color to fourth-color subpixels. The plurality of subpixels has a first arrangement or a second arrangement. The first arrangement is an arrangement in which in each row of the pixel array two of the first-color to fourth-color subpixels is interleaved. The second arrangement is a different arrangement than the first arrangement in which in each row of the pixel array two of the first-color to fourth-color subpixels are interleaved. A data driver is configured to drive the pixel array according to a first driving method when the pixel array has the first arrangement and drive the pixel array according to at least one second driving method that is different from the first driving method when the pixel array has the second arrangement.

A novel semiconductor device or display system is provided. The display system includes a correction circuit having a function of correcting an image signal by utilizing artificial intelligence. Specifically, learning by an artificial neural network enables the correction circuit to correct an image signal so as to alleviate the image discontinuity. Then, by making an inference (recognition) utilizing the artificial neural network which has finished the learning, the image signal is corrected and compensation for the image discontinuity can be made. In this manner, the junction can be inconspicuous on the displayed image, improving the quality of a high-resolution image.

A display device and a gate driver circuit of the display device are disclosed. The display device includes a shift register that shifts a gate pulse in accordance with a shift clock and sequentially supplies the gate pulse to gate lines. At least one stage of the shift register includes a discharge blocking node connected to a source terminal of the second transistor, and a discharge blocking circuit configured to charge the discharge blocking node when the Q node is charged, and discharge the discharge blocking node when the Q node is discharged.

A light valve panel and a liquid crystal display using the same are discussed. The light valve panel according to an aspect includes a liquid crystal layer, a first electrode receiving a light valve data voltage through a light valve data line, and a second electrode facing the first electrode with the liquid crystal layer interposed therebetween, and receiving a common voltage swinging in the same phase in synchronization with the light valve data voltage. The liquid crystal display device according to another aspect includes a display panel, a backlight unit, and a light valve panel.