An electro-optical device is provided and includes a plurality of first signal lines extending in a first direction on a substrate; a plurality of second signal lines extending in a second direction on the substrate, the second direction intersecting the first direction; a pixel area in which a plurality of pixel electrodes are disposed; an outer peripheral edge of the pixel area having a curved portion or a bent portion; and a first circuit block, a second circuit block, and a third circuit block arranged along the outer peripheral edge, wherein the second circuit block is arranged between the first circuit block and the first circuit block, and a first gap between the first circuit bock and the second circuit block is different from a second gap between the second circuit block and the third circuit block.

According to one embodiment, a display device comprises a display panel, first and second driver chips. The display panel includes first and second edge portions, a display area between the first and second edge portions in a first direction, first signal lines extending to the display area, and second signal lines extending to the display area. The first driver chip is connected to the first edge portion to supply video signals to the first signal lines. The second driver chip is connected to the second edge portion to supply video signals to the second signal lines. Number N of the first signal lines and number M of the second signal lines are alternately arranged in a second direction.

A display device including: a display panel including first and second display areas, and including pixels in the first and second display areas; and a data driver to output data signals to the pixels through a channels arranged along a first direction, wherein the channels include a first channel group corresponding to the first display area and a second channel group corresponding to the second display area, wherein some of the pixels emit light in different colors and have a first pixel arrangement along the first direction, and based on channel selection information about the first or second channel groups, the data driver outputs first data signals in a first output order along the first direction corresponding to the first pixel arrangement through the first channel group, and outputs second data signals in a second output order different from the first output order through the second channel group.

The present disclosure provides an apparatus and method for controlling a display module, and a display device. The apparatus for controlling the display module includes a voltage sampling circuit and a data processing circuit. The voltage sampling circuit may acquire a data voltage and a common voltage and transmit the acquired data voltage and common voltage to the data processing circuit. The data processing circuit may determine, based on the data voltage and the common voltage, whether liquid crystal molecules are deflected abnormally, and control a main control circuit to restart if the liquid crystal molecules are deflected abnormally.

Disclosed is a display apparatus which may prevent a settling time from being changed when image data input to a source drive integrated circuit (IC) is changed, for voltage interpolation. The display apparatus includes a source drive integrated circuit (IC) configured to sequentially perform a first voltage interpolation and a second voltage interpolation at every horizontal period so as to drive a data line by using N bit image data including an M bit interpolation code and an N-M bit image code.

A display device capable of performing image processing is provided. A memory node is provided in each pixel included in the display device. An intended correction data is held in the memory node. The correction data is calculated by an external device and written into each pixel. The correction data is added to image data by capacitive coupling, and the resulting data is supplied to a display element. Thus, the display element can display a corrected image. The correction enables image upconversion, for example.

The present disclosure provides a display panel and a display device. The display panel includes source driver chips. The source driver chips include charging compensation modules, and each of the charging compensation modules includes: a plurality of shift registers cascadely connected and configured to time-divisionally output a plurality of pulse signals, and a plurality of level shift circuits time-divisionally conducted in response to the plurality of the pulse signals to prevent the plurality of the level shift circuits in the source driver chips from outputting and generating a plurality electron currents at a same time, which would result in a superposition of current peaks and cause electromagnetic interference problems.

The present application discloses a driving circuit, a driving method, and a display panel. The driving circuit includes: a plurality of pixels, each pixel including a first sub-pixel and a second sub-pixel; and a switching circuit, configured to communicate one or both of the first sub-pixel and the second sub-pixel with a scan line and a data line.

An address latch, a display device, and an address latching method are disclosed. The address latch includes a write control circuit, a write latch circuit, a latch control circuit, an intermediate latch circuit, and an output latch circuit. The write latch circuit is configured to latch an address data in response to N write control signals generated by the write control circuit, N data bits of the address data are divided into (M−1) data bit groups; the latch control circuit is configured to sequentially generate M latch control signals; the intermediate latch circuit is configured to, in response to first to (M−1)-th latch control signals, latch first to (M−1)-th data bit groups latched by the write latch circuit in a time-division manner; and the output latch circuit is configured to output the address data latched by the intermediate latch circuit in response to an M-th latch control signal.

A display substrate has a display area and a peripheral area around the display area. The display substrate includes a plurality of sub-pixels arranged in an array in the display area, and an interface circuit, at least two serial-to-parallel converters and at least one display driver that are in the peripheral area. The interface circuit is configured to receive target data including a plurality of serial display data. A serial-to-parallel converter in the at least two serial-to-parallel converters is used to convert the plurality of serial display data into parallel display data. The serial-to-parallel converter is electrically connected to one display driver to provide the parallel display data to the display driver. The display driver is used to output display driving signals to a plurality of sub-pixels according to the parallel display data.