A method, computer program product, computing system, and an automated test platform for testing at least one device under test includes a test head configured to receive the at least one device under test. A processing system is configured to: provide a voltage signal having a plurality of voltages to the at least one device under test, and monitor a current flow into the at least one device under test during each of the plurality of voltages, thus generating a plurality of monitored current values that correspond to the plurality of voltages. The plurality of monitored current values are stored.

A method, computer program product, computing system, and an automated test platform for testing at least one device under test includes a test head configured to receive the at least one device under test. A processing system is configured to: provide a voltage signal having a plurality of voltages to the at least one device under test, monitor a current flow into the at least one device under test during each of the plurality of voltages, thus generating a plurality of monitored current values that correspond to the plurality of voltages, and determine if one or more of the plurality of monitored current values exceeds one or more of a plurality of current thresholds.

An apparatus is provided that is implemented to enable multiple tests of different types, such as a direct current (DC) test and/or a radio frequency (RF) test of a semiconductor device. The apparatus includes a microelectromechanical systems (MEMS) switch block coupled between the semiconductor device and automatic testing equipment (ATE). The apparatus is configured to enable/disable a DC path or an RF path to switch between a DC test and an RF test without reconfiguring the connections between the semiconductor device and the ATE. The DC path is used to perform a DC contact test for one or more pins of the semiconductor device. The RF path is used to perform an RF test for the semiconductor device.

A system for connecting a test pin of automatic test equipment (ATE) to devices for testing includes a first handler for manipulating a first portion of the devices and a second handler for manipulating a second portion of the devices. The system includes a first socket for testing devices of the first portion, which is connected to a first wire, and a second socket for testing devices of the second portion, which is connected to a the second wire. A controller multiplexes the two handlers, or dual manipulators of a single handler, to operate the handlers asynchronously in coordination with testing, such that while the ATE is testing devices for one handler, the other handler presents next devices to the ATE for immediate switch of testing between devices for each handler. The system is suitable for conventional handlers and ATE.

A wafer inspection method and inspection apparatus that perform a voltage inspection of a die on a wafer by a probe module. The probe module includes a processing module, a first probe coupled to a first electrode point of the die, and a second probe coupled to a second electrode point of the die. The first probe is coupled to the processing module, and the second probe is grounded. The processing module provides the die with a driving current through the first probe, and obtains an inspection voltage corresponding to the die. The processing module generates an inspection result of the inspection voltage based on two reference voltages respectively representing a high critical threshold value and a low critical threshold value of the die under a normal operation. The inspection result indicates an operating status of the die. Thus, inspection costs are reduced and inspection efficiency is enhanced.

A wafer inspection apparatus that perform a voltage inspection of a die on a wafer by a probe module. The probe module includes a processing module, a first probe coupled to a first electrode point of the die, and a second probe coupled to a second electrode point of the die. The first probe is coupled to the processing module, and the second probe is grounded. The processing module provides the die with a driving current through the first probe, and obtains an inspection voltage corresponding to the die. The inspection result indicates an operating status of the die. Thus, inspection costs are reduced and inspection efficiency is enhanced.

A calibrated test and measurement cable for connecting one or more devices under test and a test and measurement instrument, including a first port structured to electrically connect to a first signal lane, a second port structured to electrically connect to a second signal lane, a third port structured to electrically connect to a test and measurement instrument, and a multiplexer configured to switch between electrically connecting the first port to the third port and connected the second port to the third port. The first and second signal lanes can be included on the same device under test or different devices under test. An input can receive instructions to operate the multiplexer.

Embodiments of the present application provide a chip testing device and a method for testing chips. The device has a processor that can read information about how and in what order to connect certain pins of a chip to a power source. Based on that information, the processor controls the connections to follow the correct sequence. This approach helps make chip testing faster and more efficient.