A scan flip-flop circuit includes first and second I/O nodes, a selection circuit coupled to the first and second I/O nodes and including first through third PMOS transistors arranged in parallel and first through third NMOS transistors arranged in parallel, each including a gate configured to receive a corresponding first through third signal, and an output terminal configured to output one of the first through third signals as a selected signal based on scan direction and scan enable signals, a flip-flop circuit including an input terminal coupled to the output terminal of the selection circuit and an output terminal configured to output an output signal based on the selected signal, first and second drivers coupled to the output terminal and configured to output the first signal to the first I/O node and the second signal to the second I/O node responsive to the selected signal and the scan direction signal.