The present disclosure provides an array substrate. The array substrate includes a base on which pixel electrodes, gate lines, data lines, and thin film transistors are disposed. The data lines and the gate lines are alternately arranged to define a plurality of pixel units one-to-one corresponding to the pixel electrodes and the thin film transistors. An insulating layer is disposed between the pixel electrodes and a layer where a data pattern is located. The data pattern, part of which is overlapped with the pixel electrodes, includes the data lines and source electrodes of the thin film transistors. The insulating layer is provided with recesses, and an orthographic projection of the recess on the base is outside of an orthographic projection of an overlapping region of the pixel electrode and the data pattern on the base.

A liquid crystal display device includes a transistor, a pixel electrode, and a common electrode. The transistor includes a first gate electrode on a first substrate, a second gate electrode having a region overlapping the first gate electrode, an oxide semiconductor layer between the first gate electrode and the second gate electrode, a first insulating layer between the first gate electrode and the oxide semiconductor layer, a second insulating layer between the oxide semiconductor layer and the second gate electrode, and a first oxide conductive layer and a second oxide conductive layer disposed between the first insulating layer and the oxide semiconductor layer and disposed with the first gate electrode and the second gate electrode sandwiched from both sides. The pixel electrode is disposed between the first and the second insulating layer; the common electrode is disposed a region overlapping with the pixel electrode and on the second insulating layer.

A display device includes a first substrate and a second substrate comprising a color filter film. The first substrate includes a first organic resin layer, a second organic resin layer over the first organic resin layer; and a first opening portion provided by opening the first organic resin layer and the second organic resin layer. The first organic resin layer includes a first opening side surface having a first taper angle greater than 0° and less than 80° in the first opening portion. The second organic resin layer includes a second side surface having a second taper angle greater than 80° and less than 90° in the first opening portion. The first opening side surface is covered with the second organic resin layer.

An array substrate, a manufacturing method thereof, and a display device are disclosed. The array substrate includes: a base substrate; a gate line located on the base substrate and extending in a first direction; a data line located on the base substrate and extending in a second direction; the gate line and the data line crossing each other to define an orthographic projection of a pixel region on the base substrate; an organic film located on the gate line and the data line and located in the pixel region; and a pixel electrode located on the organic film in the pixel region. The organic film located directly above the data line has a first thickness, the organic film located directly below the pixel electrode has a second thickness, and the first thickness is greater than the second thickness.

The present invention provides an IPS TFT array substrate and a manufacturing method thereof. The manufacturing method of an IPS TFT array substrate of the present invention includes: forming a gate electrode, a scan line, a pixel electrode, and a common electrode with a first mask-involved operation, forming a first through hole and a second through hole in the gate insulation layer and an active layer with a second mask-involved operation, and forming a source electrode, a drain electrode, a data line, and a common electrode line with a third mask-involved operation. The present invention uses only three mask-involved operations to complete the manufacturing of an IPS TFT array substrate. Compared to the state of the art, the number of masks used is reduced, the manufacturing time is shortened, and thus the manufacturing cost is lowered. The IPS TFT array substrate of the present invention has a simple manufacturing process, a low manufacturing cost, and excellent electrical properties.

The number of masks and photolithography processes used in a manufacturing process of a semiconductor device are reduced. A first conductive film is formed over a substrate; a first insulating film is formed over the first conductive film; a semiconductor film is formed over the first insulating film; a semiconductor film including a channel region is formed by etching part of the semiconductor film; a second insulating film is formed over the semiconductor film; a mask is formed over the second insulating film; a first portion of the second insulating film that overlaps the semiconductor film and second portions of the first insulating film and the second insulating film that do not overlap the semiconductor film are removed with the use of the mask; the mask is removed; and a second conductive film electrically connected to the semiconductor film is formed over at least part of the second insulating film.

A thin-film transistor includes a substrate, and a light-shielding layer and an active layer sequentially over the substrate. The light-shielding layer has an accommodating space having a bottom wall and a side wall on an upper surface thereof. An orthographic projection of the active layer on the substrate is contained within an orthographic projection of the accommodating space of the light-shielding layer on the substrate. An upper side of the side wall of the accommodating space of the light-shielding layer has a larger distance to the substrate than a bottom surface, and optionally has an equal or larger distance to the substrate than a top surface, of the active layer. The light-shielding layer can comprise a gate electrode. As such, lights from an underneath and from a lateral side of the thin-film transistor that otherwise reach the active layer can be partially or completely blocked.

There is provided an array substrate, a manufacturing method therefor, a display panel, and a display device. The array substrate includes: a base substrate, and a gate metal pattern, a gate insulating layer and a source-drain metal pattern which are sequentially disposed on the base substrate. The gate metal pattern includes a signal line and a gate electrode, the signal line is in the peripheral area, the gate insulating layer is provided with a first via hole penetrating the gate insulating layer, the orthogonal projection of the first via hole on the base substrate and the orthogonal projection of the signal line on the base substrate have an overlapping area, the source-drain metal pattern includes a source-drain electrode wire, and the source-drain electrode wire is electrically connected to the signal line through the first via hole. The present disclosure achieves the function of protecting the signal line.

A display panel includes a substrate and active switches disposed on the substrate. A light-obstructing layer is disposed between the active switches and the substrate. Each of the active switches includes a semiconductor layer. The light-obstructing layer entirely covers the semiconductor layer.

The present invention provides a negative type photosensitive resin composition having high sensitivity, excellent halftone characteristics, capability to form a small tapered pattern shape, and alkali-developability. The negative type photosensitive resin composition includes, as an alkali-soluble resin (A), at least a weakly acidic group-containing resin (A1) and an unsaturated group-containing resin (A2), the weakly acidic group-containing resin (A1) containing an acidic group having an acid dissociation constant in the range of 13.0 to 23.0 in dimethyl sulfoxide, and the unsaturated group-containing resin (A2) containing an ethylenically unsaturated double bond group.