A method for manufacturing a display substrate includes a step of forming a pattern of a barrier layer and a pattern of a first electrode. The step of forming the pattern of the barrier layer and the pattern of the first electrode includes: forming a barrier layer film and a first electrode film sequentially; and forming the pattern of the barrier layer and the pattern of the first electrode by a single patterning process.

An array substrate and a manufacturing method thereof, and display panel are disclosed. The array substrate includes a substrate, a thin film transistor disposed on the substrate and a common electrode disposed on a side of the thin film transistor away from the substrate. The common electrode includes a first hollowed-out portion. An active layer of the thin film transistor includes a source electrode region, a drain electrode region and a channel region. An orthographic projection of the first hollowed-out portion on the substrate at least covers an orthographic projection of the channel region on the substrate.

An array substrate and a method for manufacturing the same, a display panel and a display device are provided. The array substrate includes a gate layer, a gate insulation layer, a source-drain layer, a first passivation layer and an ITO layer successively formed on a base substrate, a first through hole in the first passivation layer and a second through hole in the gate insulation layer, and a second passivation layer; and a part of the second passivation layer is arranged in the first and second through holes to cover a part of the ITO layer in the first through hole and the second through hole.

The present disclosure provides a liquid crystal display panel, an liquid crystal display apparatus, and a method for manufacturing same. The liquid crystal display panel includes a substrate, a black matrix disposed on the substrate, an alignment layer disposed on the black matrix, and a groove disposed on the black matrix and arranged around the alignment layer, wherein the sealant is arranged on an outside of the groove, to prevent diffusion of the alignment layer according to feature of the groove, avoid overlap of the alignment layer and the sealant and improve the cell quality.

A display device can include a pixel driver disposed on a substrate; and a display element electrically connected with the pixel driver, in which the pixel driver includes a first thin film including a first semiconductor layer, a first gate electrode, at least a part of the first gate electrode overlapping with the first semiconductor layer, and a first source electrode and a first drain electrode respectively connected with the first semiconductor layer; and a second thin film including a second semiconductor layer, a second gate electrode, at least a part of the second gate electrode overlapping with the second semiconductor layer, and a second source electrode and a second drain electrode respectively connected with the second semiconductor layer, in which the first semiconductor layer and the second semiconductor layer are disposed in different layers, and the first source electrode, the first drain electrode, the second gate electrode, the second source electrode, and the second drain electrode are disposed in a same layer.

The present invention discloses a display panel. The display panel comprises a substrate, a plurality of active switches disposed on the substrate, a color filter layer formed on the active switches, and a transparent photoresist layer formed on and covering the color filter layer. The transparent photoresist layer comprises a protective layer and at least one photo spacer.

A display device includes a display element including a first electrode, a protective layer arranged on the first electrode, a second electrode arranged on the protective layer at a pixel area and contacting a thin film transistor. A sensing line is arranged on the protective layer and contacts the first electrode through a contact hole exposing the first electrode through the third protective layer. The sensing line comprises a first conductive layer arranged on the protective layer and contacting the second electrode through the contact hole, and a second conductive layer arranged on the first conductive layer.

A method for manufacturing the array substrate includes: forming a gate metal layer on a base by a first patterning process and forming a gate insulating layer on the gate metal layer; forming a semiconductor layer and a source/drain metal layer by a second patterning process on the resulted base, the source/drain metal layer including a data line and a metal electrode connected to the data line; forming a first electrode on the resulted base and forming a channel region by a third patterning process, the channel region causing the metal electrode to form a source electrode and a drain electrode; forming a passivation layer and an organic insulating layer by a fourth patterning process on the resulted base; the organic insulating layer at least corresponding to the data line; and forming a second electrode by a fifth patterning process on the resulted base.

A mask structure is provided. The mask structure includes a plurality of mask units arranged in an array. The mask units includes a first mask configured to form a first transparent electrode in a corresponding area of a surface of the array substrate, and a second mask connected with the first mask, and configured to form a second transparent electrode in a corresponding area of the surface of the array substrate. The first mask and the second mask have different light transmittances, and light transmittance of the second mask is less than light transmittance of the first mask, to allow in different amounts of light.

A liquid crystal panel and a method of manufacturing the liquid crystal panel are provided. The liquid crystal panel includes a color filter substrate having a substrate, a black matrix disposed on the substrate, at least a recess formed on the black matrix, and an alignment layer disposed on the black matrix and covering a bottom surface of the recess. A seal is disposed on the alignment layer in the recess.