An array substrate, a display panel, a display device, and a method for fabricating an array substrate are provided. The array substrate comprises gate lines and data lines on a substrate plate which are insulated from each other and intersect to define sub-pixel units, and the data lines comprise a first data line and a second data line which are arranged side by side between two neighboring columns of sub-pixel units. Between two of the sub-pixel units which are neighbors in a column direction, at least a portion of the first data line is arranged in a layer different from the neighboring second data line. At least a part of the first data line is arranged in a layer different from that of the neighboring second data line, to overcome the problem of short circuit between dual data lines.

A display panel includes a TFT substrate, which includes a substrate, a plurality of scan lines, a plurality of data lines, and a first intermediate layer. The scan lines are disposed on the substrate along a first direction, and the scan lines are intersected with the data lines to define a plurality of sub-pixel units. The sub-pixel units include a first sub-pixel unit and a second sub-pixel unit. The first sub-pixel unit has a first light transmission area and a first component installation area, and the second sub-pixel unit has a second light transmission area and a second component installation area. The first intermediate layer is disposed on the substrate and has an opening. The opening is at least partially overlapped with the first light transmission area, and is at least partially overlapped with the second light transmission area.

A display device including a substrate, a gate driver disposed on the substrate and including a plurality of stages, a clock signal line disposed on the substrate, and transmitting a clock signal to at least one of the stages, a transistor disposed on the substrate, and a light blocking layer disposed between the substrate and the transistor and overlapping the transistor. The clock signal line includes a first conductive line and a second conductive line overlapping the first conductive line, and the first conductive line is disposed in the same layer as the light blocking layer.

A method for forming a thin film according to an exemplary embodiment of the present invention includes forming the thin film at a power density in the range of approximately 1.5 to approximately 3 W/cm.sup.2 and at a pressure of an inert gas that is in the range of approximately 0.2 to approximately 0.3 Pa. This process results in an amorphous metal thin film barrier layer that prevents undesired diffusion from adjacent layers, even when this barrier layer is thinner than many conventional barrier layers.

An array substrate includes a display area and a peripheral area adjacent to the display area; the display area includes a plurality of pixel units; each pixel unit includes a thin-film transistor (TFT) and a pixel electrode; and a drain electrode of the TFT directly contacts with the pixel electrode. In the array substrate, the drain electrode of the TFT directly contacts with the pixel electrode, and hence a uniformly distributed electric field will be generated between common electrodes and the pixel electrodes.

The present disclosure provides a thin film transistor (TFT) array substrate, its manufacturing method and a display device. The method includes steps of: forming patterns of a common electrode, a common electrode line, a gate line and a data line on a substrate by a single patterning process; forming an insulating layer; forming a pattern of an active layer by a single patterning process; forming a gate insulating layer and forming via-holes corresponding to the gate line, the data line and the active layer in the gate insulating layer by a single patterning process; and forming patterns of a pixel electrode, a gate electrode, a source electrode and a drain electrode by a single patterning process.

A display substrate, a manufacturing method thereof, a display panel and a display device are provided. The display substrate includes a display region and a non-display region. A reset zone is provided in the non-display region, and a thickness of a thin film layer provided in the reset zone is smaller than a thickness of a thin film layer provided in a zone adjacent to the reset zone. A step between the thin film layer in the reset zone and the thin film layer in the zone adjacent to the reset zone at the boundary of the reset zone and the zone adjacent to the reset zone is uniform in height; and in a direction within a surface of the display substrate and perpendicular to a rubbing direction of the display substrate, a size of the reset zone is greater than or equal to a size of the display region.

The present disclosure provides a display substrate assembly including a first substrate and a second substrate opposite to each other, the first substrate including a first region and a second region, and, a total thickness of functional layers within the first region being less than a total thickness of functional layers within the second region, of the first substrate. A thickness compensation layer is provided on at least one of the first substrate and the second substrate, a position of the thickness compensation layer corresponds to a position of the first region, and, a sum of thickness of a thickness of the thickness compensation layer and the total thickness of the functional layers within the first region equals to the total thickness of the functional layers within the second region.

The present disclosure provides an array substrate. The array substrate includes a display region and a plurality of control lines, the display region being divided into a plurality of sub-regions, each sub-region comprising a plurality of pixels, each pixel including a common electrode. Common electrodes in pixels in a sub-region are electrically connected together; common electrodes in two sub-regions are connected by a switching unit; and a control line is connected with the common electrodes in the sub-region to provide a common voltage signal to the common electrodes.

An organic EL display device has a TFT formed on the substrate, and an organic EL layer formed on the TFT. A protective layer is formed on the organic EL layer, and a first bather layer which contains AlOx is formed between the substrate and the TFT.