G02F1/13685

Displays with silicon and semiconducting oxide thin-film transistors

An electronic device may include a display having an array of display pixels on a substrate. The display pixels may be organic light-emitting diode display pixels or display pixels in a liquid crystal display. In an organic light-emitting diode display, hybrid thin-film transistor structures may be formed that include semiconducting oxide thin-film transistors, silicon thin-film transistors, and capacitor structures. The capacitor structures may overlap the semiconducting oxide thin-film transistors. Organic light-emitting diode display pixels may have combinations of oxide and silicon transistors. In a liquid crystal display, display driver circuitry may include silicon thin-film transistor circuitry and display pixels may be based on oxide thin-film transistors. A single layer or two different layers of gate metal may be used in forming silicon transistor gates and oxide transistor gates. A silicon transistor may have a gate that overlaps a floating gate structure.

ARRAY SUBSTRATE AND MANUFACTURING METHOD THEREOF, AND DISPLAY DEVICE

According to an embodiment of the present disclosure, a method for manufacturing the array substrate includes forming a first transparent conductive layer and a metallic layer successively on a base substrate, and forming a gate electrode, a source electrode, a drain electrode and a first transparent electrode by one patterning process.

THIN FILM TRANSISTOR, FABRICATION METHOD THEREOF, AND DISPLAY APPARATUS
20170269409 · 2017-09-21 · ·

Various embodiments provide a thin film transistor (TFT), a fabrication method thereof, and a display apparatus including the TFT. A carbon nanotube layer is formed over a substrate. The carbon nanotube layer includes a first plurality of carbon nanotubes. A plurality of gaps are formed through the carbon nanotube layer to provide a first patterned carbon nanotube layer. Carbon nanotube structures each including a second plurality of carbon nanotubes are formed in the plurality of gaps. The carbon nanotube structures have a carrier mobility different from the first patterned carbon nanotube layer, thereby forming an active layer for forming active structures of the thin-film transistor.

In-Cell Touch Panel, Display Device and Driving Method Thereof

An in-cell touch panel, a display device and a driving method thereof. The in-cell touch panel includes: an array substrate and an opposing substrate that are arranged opposite to each other; touch detection electrodes; touch-pressure sensing electrodes disposed between a layer provided with the touch detection electrodes and a base substrate of the array substrate. A capacitor structure is formed by the touch-pressure sensing electrodes and a metal layer disposed below the array substrate; and a touch detection chip configured to simultaneously apply touch detection signals to the touch detection electrodes and the touch-pressure sensing electrodes in a touch period, determine a touch position by detecting capacitance variations of the touch detection electrodes, and determine a touch pressure value by detecting capacitance variations of the touch-pressure sensing electrodes.

DISPLAY PANEL INCLUDING LIGHT SHIELDING LINE, DISPLAY DEVICE HAVING THE SAME AND METHOD OF MANUFACTURING THE SAME
20170322471 · 2017-11-09 ·

A display device including: a display panel which displays an image with light, including: a substrate including: first and second light blocking areas extending in first and second directions, respectively, and a pixel area at which the image is displayed, defined by the first and second light blocking areas which intersect each other; a first shielding line and a data line spaced apart from each other on the substrate at the first light blocking area; a gate line at the second light blocking area to intersect the data line; and a thin film transistor connected to the data and gate lines. The shielding line includes a protrusion protruding toward the data line, the protrusion being overlapped by the thin film transistor. The shielding line is in a same layer of the display panel as the data line among layers disposed on the substrate of the display panel.

IMAGE DISPLAY DEVICE
20170269421 · 2017-09-21 ·

An image display device includes a first substrate; a second substrate located to face the first substrate; an electro-optical layer between the first substrate and the second substrate; a plurality of pixel electrodes located between the electro-optical layer and the first substrate; a plurality of switching elements electrically connected with the plurality of pixel electrodes respectively; and a color filter included in a layer between the first substrate and the plurality of switching elements. A side of the first substrate opposite to a side thereof facing the electro-optical layer is an image display side.

Manufacturing method for liquid crystal display device

A LCD device having a large pixel holding capacitance includes opposedly facing first and second substrates, and liquid crystal between them. The first substrate includes a video signal line, a pixel electrode, a thin film transistor having a first electrode connected to the video signal line and a second electrode connected to the pixel electrode, a first silicon nitride film formed above the second electrode, an organic insulation film above the first silicon nitride film, a capacitance electrode above the organic insulation film, and a second silicon nitride film above the capacitance electrode and below the pixel electrode. A contact hole etched in both the first and second silicon nitride films connects the second electrode and the pixel electrode to each other. A holding capacitance is formed by the pixel electrode, the second silicon nitride film and the capacitance electrode.

Display device with improved image quality degradation
11398502 · 2022-07-26 · ·

The disclosure provides a display device, which includes a substrate, two adjacent pixels, and two adjacent light shielding layers. The two adjacent pixels are respectively disposed on the substrate and arranged along the first direction. The two adjacent light shielding layers are respectively disposed between the two adjacent pixels and the substrate. One of the two adjacent pixels includes a sub-pixel and a low-sensitivity sub-pixel. The two adjacent light shielding layers are spaced apart by the gap region disposed corresponding to the low-sensitivity sub-pixel. The display device of the disclosure can reduce the problem of image quality degradation caused by photo-leakage current.

ARRAY SUBSTRATE AND DISPLAY PANEL

The present disclosure provides an array substrate and a display panel, which adopt a design of a single-gated layer, in which a first electrode plate of a storage capacitor is formed in the gate layer and a second electrode plate of the storage capacitor and various functional connection wires are formed in a source/drain layer. Paths used for electric current between different film layers are realized by various functional connection wires. Therefore, a layer of gate structure is omitted, one photomask process is saved, production cost is reduced, and a problem of high production costs of the current display devices is solved.

ARRAY SUBSTRATE, DISPLAY APPARATUS, AND METHOD OF FABRICATING ARRAY SUBSTRATE

An array substrate is provided. The array substrate includes a display area having a first array of subpixels; and a partially transparent area having a second array of subpixels. The partially transparent area includes a plurality of light emitting regions spaced apart from each other by a substantially transparent non-light emitting region. The second array of subpixels is limited in the plurality of light emitting regions. The array substrate further includes a plurality of photosensors and a plurality of first thin film transistors in the substantially transparent non-light emitting region. A respective one of the plurality of photosensors includes a first polarity semiconductor layer, a second polarity semiconductor layer, and an intrinsic semiconductor layer connecting the first polarity semiconductor layer and the second polarity semiconductor layer.