A delay circuit includes an inverting receiving circuit, a reference point generating circuit, a first buffer gate and a first inverter. An inverting receiving circuit includes a first transistor and a first switching circuit. The reference point generating circuit includes a compensation resistor, a capacitor element, and a first current source. In response to the input signal being at a first potential, a voltage of the output node starts to decrease from a voltage reference point. In response to at least one of a manufacturing process, the first reference voltage, and a temperature being changed, the compensation resistor is configured to correct the voltage reference point.

A delay circuit includes an inverting receiving circuit, a reference point generating circuit, a first buffer gate and a first inverter. An inverting receiving circuit includes a first transistor and a first switching circuit. The reference point generating circuit includes a compensation resistor, a capacitor element, and a first current source. In response to the input signal being at a first potential, a voltage of the output node starts to decrease from a voltage reference point. In response to at least one of a manufacturing process, the first reference voltage, and a temperature being changed, the compensation resistor is configured to correct the voltage reference point.

A temperature sensor arrangement (10), including a bandgap voltage generator (12), which is configured to provide an output voltage (V.sub.bg); at least one semiconductor junction (14) for temperature sensing, which is biased by a biasing current flowing through said semiconductor junction (14); and at least one poly-resistor (R.sub.b3) which is connected between the output (23) of the bandgap voltage generator (12) and the semiconductor junction (14), thereby providing said biasing current from the bandgap voltage generator (12) to the semiconductor junction (14).

Aspects of the subject technology relate to a circuit for reducing random-telegraph noise in bandgap circuits. The circuit includes a number of diodes coupled in parallel at their respective first nodes to a ground potential. A number of switches are coupled to respective second nodes of the diodes. The circuit further includes a first resistor and a resistor voltage divider. The first node of the first resistor is coupled to a first node of a current source, and the first node of the resistor voltage divider is coupled to the first node of the current source. The switches are used to implement cyclic switching of the diodes in response to a train of pulses. An output voltage of the circuit is derived between a mid-node of the resistor voltage divider and a second node of the first resistor.

A self-optimizing circuit for a FD-SOI device includes a static biasing circuit, a dosimeter, a reference circuit, an amplifier, a voltage source, and a feedback circuit. The static biasing circuit supplies a first bias. The dosimeter includes a dosimeter FD-SOI device and generates a dosimeter voltage sensitive to parametric shifts in the primary FD-SOI device. The reference circuit supplies a reference voltage. The amplifier is coupled to the dosimeter and the reference circuit, and supplies a second bias at an output of the static biasing circuit, the second bias proportional to a difference between the dosimeter voltage and the reference voltage. The voltage source generates a drive voltage to which the first bias and the second bias are referenced. The feedback circuit regulates supply of the drive voltage to a well of the dosimeter FD-SOI device according to the first bias and the second bias.

A current generator circuit and a method to provide a negative higher order temperature coefficient, nHOTC, current is presented. The circuit has a current source to provide a reference current. Furthermore, the circuit has a MOS current mirror to derive a current at an output of the MOS current mirror from the reference current at an input of the MOS current mirror. In addition, the circuit has a bipolar current mirror to derive a current at an output of the bipolar current mirror from the reference current at an input of the bipolar current mirror. The output of the MOS current mirror and the output of the bipolar current mirror are arranged in series, to provide a combined current. The bipolar current mirror exhibits a mirror ratio 1:k, with 0<k<1. Furthermore, the circuit has an output to provide the nHOTC current based on the combined current.

A bandgap reference circuit includes first through fourth bipolar junction transistors (BJTs). The base and collector of the first BJT are shorted together. The second BJT is coupled to the first BJT via a first resistor. The base of the third BJT is coupled to the base of the first BJT. The base and collector of the fourth BJT are coupled together and also are coupled to the base of the second BJT. A second resistor is coupled to the fourth emitter of the fourth BJT. A third resistor is coupled to the second resistor and to the emitter of the second BJT. An operational amplifier has a first input coupled to the first resistor and the collector of the second BJT, a second input coupled to the emitter of the third BJT and the collector of the fourth BJT, and an output coupled to the collectors of the first and third BJTs.

Disclosed is a reference voltage circuit with low temperature drift, including a first voltage unit, a second voltage unit and a K times' amplification unit. The first voltage unit is configured to generate a first voltage, with a first end thereof being grounded. The K times' amplification unit is configured to amplify the first voltage by K times, with a first end thereof being connected to a second end of the first voltage unit, and with a second end thereof being connected to a first end of the second voltage unit, wherein K is a constant greater than zero. The second voltage unit is configured to generate a second voltage, with the first end thereof being connected to a current source circuit, and a second end thereof being connected to a third end of the first voltage unit to serve as an output end of a reference voltage (V.sub.REF).

A reference voltage generator includes a voltage generation circuit, an amplifier, a diode unit and a transistor. The voltage generation circuit includes an output terminal for outputting a reference voltage, a first terminal having an operational voltage, and a second terminal. The amplifier includes an input terminal coupled to the first terminal of the voltage generation circuit, an output terminal, a first terminal coupled to a first voltage terminal, and a second terminal. The diode unit includes a first terminal coupled to the second terminal of the amplifier, and a second terminal coupled to the second terminal of the voltage generation circuit and a second voltage terminal. The transistor includes a first terminal coupled to the first terminal of the amplifier, a second terminal coupled to the output terminal of the voltage generation circuit, and a control terminal coupled to the output terminal of the amplifier.

A bandgap reference circuit includes first through fourth bipolar junction transistors (BJTs). The base and collector of the first BJT are shorted together. The second BJT is coupled to the first BJT via a first resistor. The base of the third BJT is coupled to the base of the first BJT. The base and collector of the fourth BJT are coupled together and also are coupled to the base of the second BJT. A second resistor is coupled to the fourth emitter of the fourth BJT. A third resistor is coupled to the second resistor and to the emitter of the second BJT. An operational amplifier has a first input coupled to the first resistor and the collector of the second BJT, a second input coupled to the emitter of the third BJT and the collector of the fourth BJT, and an output coupled to the collectors of the first and third BJTs.