Patent classifications
G05F3/242
Fast start up, ultra-low power bias generator for fast wake up oscillators
Various embodiments relate to a bias generator including: a bias generator circuit; a master startup circuit that applies current to a first node in the bias generator circuit; a second startup circuit that applies current to additional nodes in the bias generator circuit; and a power switch that receives a power from a power supply and that provides power to the bias generator circuit, the master startup circuit, and the second startup circuit.
CIRCUIT STARTING METHOD, CONTROL CIRCUIT AND VOLTAGE REFERENCE CIRCUIT
A circuit starting method, a control circuit and a voltage reference circuit are provided. The control circuit includes an operational amplifier circuit and a comparison control circuit, wherein the operational amplifier circuit is arranged to establish an input reference voltage (VREF_INT) and an output reference voltage (VREF_OUT) by means of an operational amplifier (EA) and an external capacitor (C); and the comparison control circuit is arranged to, when the input reference voltage (VREF_INT) and the output reference voltage (VREF_OUT) are consistent, execute a toggle operation and output an enable signal (VREF_OK) to the operational amplifier (EA) so as to shut down the operational amplifier (EA).
Voltage pre-regulator having positive and negative feedback
A voltage pre-regulator can receive a variable voltage in a middle voltage range (e.g., dozens of volts) and provide a regulated voltage in a safe operating region of a low voltage device. The use of the voltage pre-regulator can allow circuits to use low voltage devices to perform additional regulation/conversion without fear of damage. The voltage pre-regulator disclosed herein can perform the voltage reduction and regulation functions of pre-regulation with commonly used transistor types because the disclosed circuits and method use a bias circuit. The bias circuit uses positive feedback so that no additional start-up circuitry is required. The positive feedback is controlled by negative feedback so that the pre-regulator is able to provide a regulated voltage that is stable over a range of input voltages and temperatures.
Constant transconductance bias circuit
A bias circuit is adapted for biasing a to-be-biased transconductance cell such that the to-be-biased transconductance cell has a constant transconductance, and includes a converter and a controller. The converter receives first and second current signals, and generates, based on the first and second current signals, a first voltage signal, a second voltage signal and a bias voltage that is for biasing the to-be-biased transconductance cell. The controller receives the first and second voltage signals from the converter, generates the first and second current signals for the converter based on the first and second voltage signals so as to make a magnitude of the first voltage signal equal a magnitude of the second voltage signal.
Low quiescent current voltage regulator with high load-current capability
Embodiments of voltage regulators and methods for operating a voltage regulator are described. In one embodiment, a voltage regulator includes a set of current mirror circuits configured to convert an input voltage into an output voltage and a voltage buffer circuit configured to buffer a reference voltage for the set of current mirror circuits. The set of current mirror circuits form a positive feedback loop. Other embodiments are also described.
Apparatus and method for gallium nitride (GaN) amplifiers
A wide bandgap voltage reference circuit generates a temperature stable negative bias reference voltage for use in wide bandgap circuits. The reference circuit uses field effect transistor (FET) based source feedback. It can also be used as source feedback in high power high bandgap device applications, where constant current is required over process and thermal variations.
CURRENT REFERENCE
In an example, an integrated circuit includes a junction-gate field effect transistor (JFET), a current generator, a dynamic filter, and an output transistor. The JFET has a JFET gate, a JFET source, and a JFET drain, the JFET drain adapted to be coupled to a power supply. The current generator has a current generator input and current generator outputs, the current generator input coupled to the JFET source and a first of the current generator outputs coupled to the JFET gate. The dynamic filter has a dynamic filter input and a dynamic filter output, the dynamic filter input coupled to a second of the current generator outputs. The output transistor has an output transistor gate coupled to the dynamic filter output.
SEMICONDUCTOR DEVICE, DIGITALLY CONTROLLED OSCILLATOR, AND CONTROL METHOD OF SEMICONDUCTOR DEVICE
A semiconductor device according to the present embodiment includes a plurality of switching elements and a plurality of variable capacitance elements. The switching elements are switching elements connected in series between a first control terminal and a second control terminal and plural types of capacitance control signals can be supplied to the first control terminal and the second control terminal. The variable capacitance elements have capacitance control terminals connected to corresponding one ends of the switching elements, respectively.
Electronic circuit for generating reference voltage
An electronic circuit includes first to third transistors. The first transistor has a first channel width and a first channel length and generates a first potential difference by passing an operating current based on a first operating voltage. The second transistor has a second channel width and a second channel length and generates a second potential difference based on the operating current. The third transistor generates a third potential difference based on a second operating voltage and the operating current. A sum of a level of the first operating voltage and a level of the first potential difference corresponds to a sum of a level of the second operating voltage, a level of the second potential difference, and a level of the third potential difference. The first channel width is greater than the second channel width, or the first channel length is longer than the second channel length.
Bias current generator circuitry
A supply voltage sensitivity of an output current of a bias current generator circuit is reduced. The bias current generator includes a plurality of transistors and a plurality of resistors coupled to the plurality of transistors. The supply voltage sensitivity of the output current of the bias current generator circuit is reduced by applying a second bias current generated by the bias current generator circuit to a first bias current generated by the bias current generator circuit.