Patent classifications
G05F3/262
START-UP CIRCUIT FOR REFERENCE VOLTAGE/CURRENT GENERATOR
This document describes a start-up circuit for a self-biasing generator providing a reference voltage or a reference current, the start-up circuit comprising: an impedance circuit; means for coupling, in response to a start-up signal input to the start-up circuit, the impedance circuit to a bias voltage line of a current mirror circuit of the self-biasing generator, thereby inducing current to flow in the self-biasing generator and starting the self-biasing generator; a bypass current source coupled to the current mirror circuit and to the impedance, wherein the bypass current source is configured to be driven by a current in the current mirror circuit and to supply current to the impedance in proportion to the current in the current mirror circuit, thereby limiting the current induced to the self-biasing generator by the start-up circuit.
Leakage Compensation Circuit
Circuits and methods that compensate for the problems created by low-dropout regulator (LDO) leakage current, particularly when stressed. Embodiments include an improved LDO configured to provide a load current, and which includes a leakage current compensation circuit. The leakage current compensation circuit generates a compensating current that offsets the leakage current through the pass device of the LDO during conditions that induce such leakage. More specifically, the leakage current compensation circuit can replicate the leakage current of the pass device of the LDO and feed a compensating current back into the LDO from a current mirror circuit while drawing zero-power during normal use, when leakage current is absent. LDO circuits that include a leakage current compensation circuit are particularly useful as voltage sources for positive or negative charge pumps, but are also quite useful in applications requiring a regulated voltage output.
High voltage gate driver current source
A power supply system for USB Power Delivery includes a current source drive circuit to control a power FET to regulate the supply of power along a power path. The current source drive circuit includes a cascode current source and a cascode protection circuit formed by a source follower and a feedback voltage divider. The source follower can be a transistor with its gate connected to a cascode node between upper- and lower-stage transistors of the cascode current source. The divider node of the voltage divider is connected to the gate of the lower-stage transistor. The current source drive circuit can operate within the gate-source voltage specifications of 30-volt DEPMOS devices, and can provide high output impedance to the gate of power FET and a current limit circuit during current limiting operation, without requiring an extra high-voltage mask during fabrication.
IMAGE SENSING DEVICE HAVING A MIRRORING CIRCUIT SUITABLE FOR COMPENSATING AN OPERATING CURRENT
Disclosed is an image sensing device including a current supply circuit coupled between a supply terminal of a first voltage and a pair of output terminals, an input circuit coupled between the pair of output terminals and a common node, and suitable for receiving a pixel signal and a ramp signal, and a mirroring circuit coupled between the common node and a supply terminal of a second voltage, and suitable for compensating for an operating current, which flows between the common node and the supply terminal of the second voltage, based on a reference current when generating the operating current by mirroring the reference current.
APPARATUS INCLUDING A BIAS VOLTAGE GENERATOR
An apparatus comprising: a cascode arrangement comprising two or more transistors, the cascode arrangement coupled between a supply voltage terminal for receiving a supply voltage from a battery and a ground terminal, and a bias voltage generator configured to provide a bias voltage to at least one of the two or more transistors of the cascode arrangement to bias the cascode arrangement, the bias voltage generator further configured to increase the bias voltage with increasing supply voltage at a first rate over a first supply voltage range and increase the bias voltage with increasing supply voltage at a second rate, greater than the first rate, over a second supply voltage range, wherein the second supply voltage range comprises a range of voltages greater than the first supply voltage range.
AMPLIFIER CIRCUIT, DIFFERENTIAL AMPLIFIER CIRCUIT, RECEPTION CIRCUIT, AND SEMICONDUCTOR INTEGRATED CIRCUIT
An amplifier circuit according to an embodiment includes a first circuit, a second circuit, and a third circuit. The first circuit includes a first transistor connected between an input node through which an input current flows and a reference potential node. The first transistor has a gate electrode connected to the input node. The second circuit includes a low-pass filter circuit and a second transistor connected in parallel to the first transistor between the input node and the reference potential node. The second transistor has a gate electrode connected to the gate electrode of the first transistor via the low-pass filter circuit. The third circuit includes a third transistor connected between an output node through which an output current flows and the reference potential node, the third circuit having a gate electrode connected to the gate electrode of the first transistor.
Voltage converter
A voltage converter comprises a current mirror circuit, a switch circuit, and a bias circuit electrically connected to a substrate of the switch circuit. When an electrical signal provided by the first electrical signal end is greater than an electrical signal provided by the second electrical signal end, the bias circuit is turned on to turn on the switch circuit, thereby an output end of the mirror current circuit outputs the electrical signal provided by the second electrical signal end. Otherwise, the output end of the current mirror circuit outputs the second voltage signal.
SYSTEMS AND METHODS FOR INITIALIZING BANDGAP CIRCUITS
A semiconductor device may include a bandgap circuit that outputs a reference voltage. The bandgap circuit may include a bandgap core circuit and a startup circuit coupled to the bandgap core circuit. The startup circuit may connect a voltage source to a node that corresponds to an output of the bandgap core circuit in response to the bandgap core circuit being initialized. The startup circuit may also disconnect the voltage source from the node in response to the output voltage being equal to or greater than a desired voltage (e.g., a threshold voltage) and one or more local voltages of the bandgap core circuit being equal to or greater than a local threshold voltage.
Leakage compensation circuit
Circuits and methods that compensate for the problems created by low-dropout regulator (LDO) leakage current, particularly when stressed. Embodiments include an improved LDO configured to provide a load current, and which includes a leakage current compensation circuit. The leakage current compensation circuit generates a compensating current that offsets the leakage current through the pass device of the LDO during conditions that induce such leakage. More specifically, the leakage current compensation circuit can replicate the leakage current of the pass device of the LDO and feed a compensating current back into the LDO from a current mirror circuit while drawing zero-power during normal use, when leakage current is absent. LDO circuits that include a leakage current compensation circuit are particularly useful as voltage sources for positive or negative charge pumps, but are also quite useful in applications requiring a regulated voltage output.
Reference voltage generator based on threshold voltage difference of field effect transistors
An aspect of the disclosure relates to a reference voltage generator, including: a first field effect transistor (FET) including a first threshold voltage; a second FET including a second threshold voltage different than the first threshold voltage; a gate voltage generator coupled to gates of the first and second FETs; a first current source coupled in series with the first FET between first and second voltage rails; a second current source; and a first resistor coupled in series with the second current source and the second FET between the first and second voltage rails, wherein a reference voltage is generated across the first resistor.