The present disclosure generally relates to audio output for time-based notifications. Enhanced alerts for time-based notifications based on various notification conditions provides users with clarity about which notifications are being output, thereby providing an improved user interface.

The technology disclosed herein pertains to a system and method for profiling performance of an embedded computation instruction set (CIS), the method including receiving a profiling component to a computational storage device (CSD), the profiling component being configured to measure one or more execution parameters of a computational instruction set (CIS), executing the CIS at a program slot in a computational storage processor of the CSD, monitoring the execution of the CIS to generate a log of the execution parameters of the CIS, and communicating the log to a host in response to receiving a get-log page command.

The present disclosure generally relates to audio output for time-based notifications. Enhanced alerts for time-based notifications based on various notification conditions provides users with clarity about which notifications are being output, thereby providing an improved user interface.

System and method for sharing a PCIe endpoint device with a plurality of host computers, by allocating a quantum of time to a host computer of a plurality of host computers coupled to a PCIe switch, wherein the quantum of time identifies a duration of time during which the host computer has exclusive access to a shareable PCIe endpoint device coupled to the PCIe switch. Requests from the host computer are transmitted to an emulated PCIe endpoint device of the PCIe switch during the quantum of time and the requests are then redirected from the emulated PCIe endpoint device to the shareable PCIe endpoint device during the quantum of time allocated to the host computer.

An instruction scheduling method and an instruction scheduling system for a reconfigurable array processor. The method includes: determining whether a fan-out of a vertex in a data flow graph (DFG) is less than an actual interconnection number of a processing unit in a reconfigurable array; establishing a corresponding relationship between the vertex and a correlation operator of the processing unit; introducing a register to a directed edge, acquiring a retiming value of each vertex; arranging instructions in such a manner that retiming values of the instruction vertexes are in ascending order, and acquiring transmission time and scheduling order of the instructions; folding the DFG, placing an instruction to an instruction vertex; inserting a register and acquiring a current DFG; and acquiring a common maximum subset of the current DFG and the reconfigurable array by a maximum clique algorithm, and distributing the instructions.

Embodiments of the present disclosure relate to a method, device and computer program product for managing a service. The method comprises in response to processor credits for the service reaching threshold credits at a first time instant (t1), determining a second time instant when a first operation for the service is to be performed. The method further comprises determining, based on a set of historical processor credits between the first time instant and the second time instant, first processor credits related to a second set of time periods which is between the first time instant and second time instant. The method further comprises determining, based on a first time length from the first time instant to the second time instant, a second time length of the first set of time periods and a third time length of the second set of time periods, second processor credits that can be obtained between a third time instant when the second set of time periods ends and the second time instant; in response to the first, second and third processor credits satisfying a predetermined condition, performing the second operation within the second set of time periods. The method may increase the time for performing the second operation without affecting the first operation.

A memory controller, a memory system including the memory controller and a method for operating the memory system are disclosed. The memory controller updates a reference parameter for a memory area in which at least part of the mapping information is stored and determines whether to activate the memory area based on the reference parameter to effectively execute commands received from a host.

The technology disclosed herein pertains to a system and method for profiling performance of an embedded computation instruction set (CIS), the method including receiving a profiling component to a computational storage device (CSD), the profiling component being configured to measure one or more execution parameters of a computational instruction set (CIS), executing the CIS at a program slot in a computational storage processor of the CSD, monitoring the execution of the CIS to generate a log of the execution parameters of the CIS, and communicating the log to a host in response to receiving a get-log page command.

The technology disclosed herein pertains to a system and method for profiling performance of an embedded computation instruction set (CIS), the method including receiving a profiling component to a computational storage device (CSD), the profiling component being configured to measure one or more execution parameters of a computational instruction set (CIS), executing the CIS at a program slot in a computational storage processor of the CSD, monitoring the execution of the CIS to generate a log of the execution parameters of the CIS, and communicating the log to a host in response to receiving a get-log page command.

Techniques are disclosed relating to scheduling program tasks in a server computer system. An example server computer system is configured to maintain first and second sets of task queues that have different performance characteristics, and to collect performance metrics relating to processing of program tasks from the first and second sets of task queues. Based on the collected performance metrics, the server computer system is further configured to update a scheduling algorithm for assigning program tasks to queues in the first and second sets of task queues. In response to receiving a particular program task associated with a user transaction, the server computer system is also configured to select the first set of task queues for the particular program task, and to assign the particular program task in a particular task queue in the first set of task queues.