A storage control device includes: an auxiliary cache memory that is a nonvolatile memory; a volatile memory; and a processor configured to execute a saving control process after a predetermined failure occurs, the saving control process being configured to (a) cause a writing control process to stop writing of data stored in the auxiliary cache memory to the storage medium, (b) secure, in the auxiliary cache memory, a storage region for storing the management information of the volatile memory, (c) generate a copy of management information of the volatile memory in the storage region, and (d) cause the writing control process to execute control to write first data stored in the volatile memory to the auxiliary cache memory or the storage medium based on the management information of the auxiliary cache memory.

Data units are stored in private caches in nodes of a multiprocessor system, each node containing at least one processor (CPU), at least one cache private to the node and at least one cache location buffer (CLB) private to the node. In each CLB location information values are stored, each location information value indicating a location associated with a respective data unit, wherein each location information value stored in a given CLB indicates the location to be either a location within the private cache disposed in the same node as the given CLB, to be a location in one of the other nodes, or to be a location in a main memory. Coherence of values of the data units is maintained using a cache coherence protocol. The location information values stored in the CLBs are updated by the cache coherence protocol in accordance with movements of their respective data units.

Cache slots on a storage system may be shared between entities processing write operations for logical storage unit (LSU) tracks and entities performing remote replication for write operations for the LSU tracks. If a new write operation is received on a first storage system (S1) for a track of an LSU (R1) when the cache slot mapped to the R1 track is locked by a process currently transmitting data of the cache slot to a second storage system (S2), a new cache slot may be allocated to the R1 track, the data of the original cache slot copied to the new cache slot, and the new write operation for the R1 track initiated on S1 using the new cache slot; while the data of the original cache slot is independently, and perhaps concurrently, transmitted to S2 to be replicated in R2, the LSU on S2 that is paired with R1.

Methods and systems for managing synonyms in VIPT caches are disclosed. A method includes tracking lines of a copied cache using a directory, examining a specified bit of a virtual address that is associated with a load request and determining its status and making an entry in one of a plurality of parts of the directory based on the status of the specified bit of the virtual address that is examined. The method further includes updating one of, and invalidating the other of, a cache line that is associated with the virtual address that is stored in a first index of the copied cache, and a cache line that is associated with a synonym of the virtual address that is stored at a second index of the copied cache, upon receiving a request to update a physical address associated with the virtual address.

Disclosed in some examples are methods, systems, devices, and machine-readable mediums that provide for techniques for scrambling and/or updating meta-data that enable an efficient internal copyback operation. In some examples, in order to update the meta-data, the meta-data and host-data are separated and the only the meta-data is sent to the controller to be updated during a modified internal copyback operation. The host-data is not transmitted to the controller. While sending the meta-data utilizes resources of the communication link between the memory dies and the controller, it uses much fewer resources than if the host-data were also transmitted.

A method and a system detects a cache line as a potential or confirmed hot cache line based on receiving an intervention of a processor associated with a fetch of the cache line. The method and system include suppressing an action of operations associated with the hot cache line. A related method and system detect an intervention and, in response, communicates an intervention notification to another processor. An alternative method and system detect a hot data object associated with an intervention event of an application. The method and system can suppress actions of operations associated with the hot data object. An alternative method and system can detect and communicate an intervention associated with a data object.

A programmable switch receives a cache line request from a client of a plurality of clients on a network to obtain a cache line. One or more additional cache lines are identified based on the received cache line request and prefetch information. The cache line and the one or more additional cache lines are requested from one or more memory devices on the network. The requested cache line and the one or more additional cache lines are received from the one or more memory devices, and are sent to the client.

In an example, there is disclosed a host-fabric interface (HFI), including: an interconnect interface to communicatively couple the HFI to an interconnect; a network interface to communicatively couple the HFI to a network; network interface logic to provide communication between the interconnect and the network; a coprocessor configured to provide an offloaded function for the network; a memory; and a caching agent configured to: designate a region of the memory as a shared memory between the HFI and a core communicatively coupled to the HFI via the interconnect; receive a memory operation directed to the shared memory; and issue a memory instruction to the memory according to the memory operation.

Cache slots on a storage system may be shared between entities processing write operations for logical storage unit (LSU) tracks and entities performing remote replication for write operations for the LSU tracks. If a new write operation is received on a first storage system (S1) for a track of an LSU (R1) when the cache slot mapped to the R1 track is locked by a process currently transmitting data of the cache slot to a second storage system (S2), a new cache slot may be allocated to the R1 track, the data of the original cache slot copied to the new cache slot, and the new write operation for the R1 track initiated on S1 using the new cache slot; while the data of the original cache slot is independently, and perhaps concurrently, transmitted to S2 to be replicated in R2, the LSU on S2 that is paired with R1.

A method for executing a transaction for a processor associated with a persistent memory and with a cache memory, the cache memory comprising cache lines associated with respective states, including: if a cache line is associated with a state allowing data to be copied directly: copying data to the cache line; associating the line with a state representative of an allocation to transaction data; otherwise: flushing lines associated with a state representative of an allocation to external data and associating them with a state indicating that content of the lines has not been modified; copying data to the flushed lines; associating these lines with a state representative of an allocation to transaction data.