Patent classifications
G05F3/225
Circuit for generating a temperature dependent output
The present disclosure provides a circuit for generating a complimentary to absolute temperature (CTAT) voltage reference. The primary contributor to the voltage reference is first bipolar junction transistor, which is configured in diode mode, to produce the CTAT voltage. Such references include a non-linear component. A pair of bipolar junction transistors are coupled to the first bipolar junction transistor, and are configured to generate a delta base-emitter voltage. By coupling one of the pair to a proportional to absolute temperature current source, and the other to a current course which is substantially independent of absolute temperature, a further non-linear component is introduced, which is complimentary to the non-linear component introduced by the first bipolar junction transistor. The pair of bipolar transistors share a common emitter area size. As such, the non-linear component of the first bipolar junction transistor is compensated by the delta base-emitter arrangement, resulting in a more linear output.
LOW-VOLTAGE COLLECTOR-FREE BANDGAP VOLTAGE GENERATOR DEVICE
Example implementations include a bandgap voltage device with a first current source operatively coupled to a bandgap input node and a bandgap output node and operable to output a first proportional-to-absolute-temperature (PTAT) current, a current mirror including a first bandgap transistor and a second bandgap transistor, and operatively coupled to the bandgap output node, and a second current source operatively coupled to the current mirror and operable to output a second PTAT current. Example implementations also include a bandgap transistor device with a first P+ layer proximate to a center of a planar surface of a transistor device, a first N+ layer at least partially surrounding the first P+ layer along the planar surface, a second P+ layer at least partially surrounding the first N+ layer along the planar surface, a second N+ layer at least partially surrounding the second P+ layer along the planar surface, and a third P+ layer at least partially surrounding the second N+ layer along the planar surface.
BANDGAP REFERENCE WITH INPUT AMPLIFIER FOR NOISE REDUCTION
A bandgap reference circuit includes first through fourth bipolar junction transistors (BJTs). The base and collector of the first BJT are shorted together. The second BJT is coupled to the first BJT via a first resistor. The base of the third BJT is coupled to the base of the first BJT. The base and collector of the fourth BJT are coupled together and also are coupled to the base of the second BJT. A second resistor is coupled to the fourth emitter of the fourth BJT. A third resistor is coupled to the second resistor and to the emitter of the second BJT. An operational amplifier has a first input coupled to the first resistor and the collector of the second BJT, a second input coupled to the emitter of the third BJT and the collector of the fourth BJT, and an output coupled to the collectors of the first and third BJTs.
BANDGAP REFERENCE CIRCUIT AND ELECTRONIC DEVICE INCLUDING THE SAME
A bandgap reference circuit generates a PTAT voltage and a CTAT voltage having a different temperature characteristic from the PTAT voltage and generates a reference voltage based on the PTAT voltage, the CTAT voltage, and a compensation voltage. The bandgap reference circuit generates a CTAT current having a different temperature characteristic from the PTAT voltage based on the CTAT voltage and determines the compensation voltage based on the CTAT current.
BIASING SCHEME FOR POWER AMPLIFIERS
A front-end module comprises a low-dropout (LDO) voltage regulator, a reference current generator, and a power amplifier. The LDO voltage regulator, reference current generator, and power amplifier are integrated on a first semiconductor die.
BIASING SCHEME FOR POWER AMPLIFIERS
A front-end module comprises a bias network including a current mirror, a junction temperature sensor, an n-bit analog-to-digital converter, an n-bit current source bank configured to automatically set reference current levels for one or more operating temperature regions, and a power amplifier. The bias network, junction temperature sensor, n-bit analog-to-digital converter, n-bit current source bank, and power amplifier are integrated on a first semiconductor die.
Biasing scheme for power amplifiers
A front-end module comprises a low-dropout (LDO) voltage regulator, a reference current generator, a power amplifier, and a voltage reference configured to provide a reference voltage to the LDO voltage regulator and the reference current generator. The LDO voltage regulator, reference current generator, power amplifier, and voltage reference are integrated on a first semiconductor die.
Semiconductor integrated circuit with configurable setting based on temperature information
A semiconductor integrated circuit includes a bandgap reference circuit that includes a first bandgap element, a second bandgap element, and a current mirror circuit. The bandgap reference circuit is configured to generate a temperature-dependent first voltage and a temperature-independent reference voltage. The semiconductor integrated circuit includes an analog-to-digital converter configured to convert the first voltage into an output code based on the reference voltage and output the first voltage as temperature information, and a setting control circuit configured to change at least one setting of the bandgap reference circuit based on the temperature information.
Biasing scheme for power amplifiers
A front-end module comprises a bias network including a current mirror, a junction temperature sensor, an n-bit analog-to-digital converter, an n-bit current source bank configured to automatically set reference current levels for one or more operating temperature regions, and a power amplifier. The bias network, junction temperature sensor, n-bit analog-to-digital converter, n-bit current source bank, and power amplifier are integrated on a first semiconductor die.
CONTROL CIRCUIT, LIGHT SOURCE DRIVING DEVICE AND DISPLAY APPARATUS
The present disclosure provides a control circuit, a light source driving device and a display apparatus. The control circuit comprises a current source circuit configured to generate a current signal having a magnitude positively correlated with a temperature of a region where the control circuit is located; a conversion circuit coupled to the current source circuit and configured to convert the current signal generated by the current source circuit into a voltage signal; and a first comparison circuit coupled to the conversion circuit and configured to output a control signal for controlling brightness of a light source according to the voltage signal received from the conversion circuit, a magnitude of the control signal being negatively correlated with the temperature of the region where the control circuit is located, and the brightness of the light source being positively correlated with the magnitude of the control signal.