In an embodiment an electric circuit arrangement includes a current generator circuit having a first output terminal and configured to generate an output current, a controller configured to generate control signals to control the current generator circuit, a random code generator configured to generate random codes and a counter configured to generate a count, wherein the current generator circuit comprises a plurality of output current paths and a plurality of controllable switching circuits, wherein each of the output current paths includes a respective electrical component to define a current in the respective output current path, wherein a respective one of the controllable switching circuits is coupled to a respective one of the output current paths to connect the respective electrical component to the first output terminal, and wherein the random code generator is configured to provide a respective code derived from a respective one of the random codes.

A power semiconductor circuit includes a power semiconductor device for switching a load, and a comparator which is directly or indirectly connected to the power semiconductor device at a connection point for the load by means of a first input and to which a predefined or predefinable reference voltage can be fed at a second input, the power semiconductor device being activatable by means of an output of the comparator.

In certain aspects, a bias generation circuit comprises a bias voltage generator. The bias voltage generator has a main NMOS transistor having a drain and a gate of the main NMOS transistor both coupled to a first terminal, a main resistor having a first main resistor terminal and a second main resistor terminal, wherein the first main resistor terminal couples to a source of the main NMOS transistor; and a main PMOS transistor having a source of the main PMOS transistor coupled to the second main resistor terminal and a drain and a gate of the main PMOS transistor both coupled to a second terminal, wherein the second terminal couples to a main ground. The bias generation circuit further comprises an array of sensors coupled to the first terminal and the second terminal.

To provide a nonvolatile storage element capable of being formed by an ordinary CMOS process using single layer polysilicon without requiring exclusive forming process and a reference voltage generation circuit with high versatility and high precision. A reference voltage generation circuit includes nonvolatile storage elements formed of single layer polysilicon. The nonvolatile storage elements each include a MOS transistor including a floating gate, a MOS transistor including a floating gate, and a MOS transistor including a floating gate.

A current reference circuit and a semiconductor IC including the current reference circuit, the current reference circuit including a proportional to absolute temperature (PTAT) current generator configured to generate, in an output branch, a first current proportional to a temperature; and a current subtractor configured to generate a reference current by subtracting a second current generated based on a current flowing in an internal branch of the PTAT current generator, from the first current flowing in the output branch. The second current is set to have a same temperature-based change characteristic as the first current and a level different from a level of the first current.

There is provided a reference voltage generator for providing an adaptive voltage. The reference voltage generator includes a steady current source and a PMOS transistor and an NMOS transistor cascaded to each other. A reference voltage provided by the reference voltage generator is determined by gate-source voltages of the PMOS transistor and the NMOS transistor. As said gate-source voltages vary with the temperature and manufacturing process, the reference voltage forms a self-adaptive voltage.

Across the entire operating temperature range, and without requiring a new transistor element, the constant voltage output by a constant voltage circuit can be controlled to a voltage greater than or equal to the stop-oscillating voltage and as low as possible. A resistance 11b that negatively feeds back a reference current Iref is connected between the gate and source of a depletion mode n-channel transistor 11a configured to produce the reference current Iref on which the constant voltage VREG is based. The resistance of resistance 11b has a gradient to temperature change of the same sign as the gradient of the difference between the constant voltage and the stop-oscillating voltage to temperature change when the gradient of the resistance value of the resistance to temperature change is 0.

An oscillation circuit small in circuit scale and in the influence of temperature on its oscillation frequency is provided. The oscillation circuit includes: a constant current circuit configured to supply a current based on a first depletion MOS transistor; a charge/discharge circuit having a first capacitor, a second capacitor, a second depletion MOS transistor, and a third depletion MOS transistor provided in a current path for charging the second capacitor, the first to third depletion MOS transistors having the same threshold voltage and the same temperature characteristics of the threshold voltage; and an RS latch circuit configured to output a waveform that falls by input of the reset signal and rises by input of the set signal.

A duty cycled voltage reference circuit is turned on and off synchronously with the operation of a second, reference-consuming, duty-cycled circuit to which it supplies a reference. When the reference consuming circuit no longer has need of the reference, the voltage reference circuit itself is then also powered down. The reference circuit is then powered back up for the next duty cycle sufficiently in advance of the reference consuming circuit such that any auto-zeroing and noise filtering operations required by the reference circuit are complete and a stable reference voltage is output at least simultaneously with, or slightly before, the reference consuming circuit begins to make use of the voltage reference signal. In this manner, synchronous duty-cycled operation of the voltage reference circuit with the reference-consuming circuit is obtained, with the consequence that power consumption by the reference circuit is reduced.

A reference voltage generator circuit includes a band gap reference voltage circuit that generates a predetermined reference voltage, and a first correction current generator circuit that generates a first correction current in response to change in temperature. The first correction current generator circuit generates a plurality of voltage peaks in response to the change in temperature in the output voltage of the reference voltage generator circuit by injecting the first correction current into the band gap reference voltage circuit, and output voltage characteristics configuring each of the plurality of voltage peaks are made such that the output voltage varies continuously with respect to the change in temperature. The first correction current generator circuit includes a temperature setting circuit that can change the plurality of temperatures corresponding to each of the plurality of voltage peaks.