A voltage generation circuit may include: a first transistor coupled to an internal supply voltage terminal, and configured as a diode-connected transistor; a second transistor coupled to the first transistor and configured as a diode-connected transistor; and a third transistor coupled between the second transistor and a ground voltage terminal, and configured to operate according to a first reference voltage generated based on an external supply voltage. The voltage generation circuit may limit a variation in level of a second reference voltage which is generated through a drain terminal of the second transistor as a threshold voltage of the second transistor rises according to a rise in level of the internal supply voltage.

An electronic circuit is disclosed. The electronic circuit includes a reference voltage generator, which includes a first candidate circuit configured to generate a first candidate reference voltage, a second candidate circuit configured to generate a second candidate reference voltage, and a selector circuit configured to select one of the first and second candidate reference voltages. The reference voltage generator also includes a third circuit configured to generate a power supply voltage based on the selected candidate reference voltage.

According to one embodiment, a semiconductor device includes a first current mirror having an output end coupled to a first node, a second current mirror having an output end coupled to a second node, a third current mirror having an input end coupled to the second node and an output end coupled to the first node, a fourth current mirror having an input end coupled to the first node, and an output driver that generate a current based on the fourth current mirror. A current flows to the first current source changes at a first ratio with respect to temperature, a current flows to the second current source changes at a second ratio having a negative correlation with respect to temperature, and an absolute value of the first ratio is smaller than that of the second ratio.

An apparatus includes a poly current generator circuit, which includes a fractional bandgap circuit, or a bandgap voltage reference circuit and a current reference generator, an adaptive bias current generator, a frequency generator to generate an output clock signal having a select frequency, wherein the frequency generator includes a current starved ring oscillator that comprises n identical cascaded stages connected in a shape of a ring, wherein an output of the nth cascaded stage is fed back as an input of the first cascaded stage, wherein n is an odd number greater than or equal to 3; and clock buffers configured to buffer the output clock signal generated by the frequency generator for distribution.

The present invention discloses a reference circuit with temperature compensation, which is characterized in that a current output circuit is designed to receive a reference voltage from a bias voltage generation circuit, generate two reference currents with opposite temperature variation characteristics, and then merge them into a compensated current with temperature compensation. In addition, a voltage output circuit is designed to receive a reference voltage from a bias voltage generation circuit, which includes several field-effect transistors operating in saturation regions, and a precision voltage increases with threshold voltages of the field-effect transistors to compensate for the temperature variation. Resistors can be incorporated or sizes of the field effect transistors can be changed to adjust the output current, output voltage or the temperature variation characteristics.

A front-end module comprises a bias network including a current mirror, a junction temperature sensor, an n-bit analog-to-digital converter, an n-bit current source bank configured to automatically set reference current levels for one or more operating temperature regions, and a power amplifier. The bias network, junction temperature sensor, n-bit analog-to-digital converter, n-bit current source bank, and power amplifier are integrated on a first semiconductor die.

A front-end module comprises a low-dropout (LDO) voltage regulator, a reference current generator, a power amplifier, and a voltage reference configured to provide a reference voltage to the LDO voltage regulator and the reference current generator. The LDO voltage regulator, reference current generator, power amplifier, and voltage reference are integrated on a first semiconductor die.

The invention provides a voltage-generating circuit with a simple configuration capable of saving space and generating reliable voltage. The voltage-generating circuit of the invention includes a reference voltage-generating unit, a PTAT voltage-generating unit, a comparison unit, and a selection unit. The reference voltage-generating unit generates a reference voltage essentially without dependency on temperature. The PTAT voltage-generating unit generates a temperature-dependent voltage with a positive or negative dependency on temperature. The temperature-dependent voltage is equal to the reference voltage at a target temperature. The comparison unit compares the reference voltage with the temperature-dependent voltage. The selection unit selects and outputs either the reference voltage or the temperature-dependent voltage.

A thermally-isolated-metal-oxide-semiconducting (TMOS) sensor has inputs coupled to first and second nodes to receive first and second bias currents, and an output coupled to a third node. A tail has a first conduction terminal coupled to the third node and a second conduction terminal coupled to a reference voltage. A control circuit applies a control signal to a control terminal of the tail transistor based upon voltages at the first and second nodes so that a common mode voltage at the first and second nodes is equal to a reference common mode voltage. A differential current integrator has a first input terminal coupled to the second node and a second input terminal coupled to the first node, and provides an output voltage indicative of an integral of a difference between a first output current at the first input terminal and a second output current at the second input terminal.

A reference load includes a parallel connection of a resistor load having a resistor and a transistor load having a plurality of transistors, wherein a temperature coefficient of the resistor load is positive, and a temperature coefficient of the transistor load is negative.