The present technology relates to an oscillation apparatus and an oscillation method allowing a variation in a frequency of a clock signal to fall within a predetermined range without using a reference clock signal. An oscillation apparatus according to the first aspect of the present technology includes an oscillation section oscillating a clock signal, an adjustment section changing a parameter of a constituent element constituting the oscillation section to thereby adjust a frequency of the clock signal, and a calibration control section controlling the adjustment section to perform frequency calibration of the oscillation section in a case in which a variation in a frequency of the clock signal oscillated by the oscillation section falls within a second range exceeding a first range permitted in an application of the clock signal. The present technology is applicable to a system that permits a variation within a certain range to a transmission rate or a system that permits a variation in a sampling (clock) frequency within a certain range to a predetermined transmission rate.

In an example, there is disclosed a configurable impedance element, having: a first impedance network including a plurality of series impedance elements and providing an initial impedance; a trim impedance network parallel to the first impedance network, including a plurality of corresponding impedance elements to the impedance elements of the first impedance network; and antifuses between the impedance elements of the first impedance network and their corresponding impedance elements of the trim network. There is also disclosed an integrated circuit including the impedance element, and a method of manufacturing and configuring the impedance element.

In an example, there is disclosed a configurable impedance element, having: a first impedance network including a plurality of series impedance elements and providing an initial impedance; a trim impedance network parallel to the first impedance network, including a plurality of corresponding impedance elements to the impedance elements of the first impedance network; and antifuses between the impedance elements of the first impedance network and their corresponding impedance elements of the trim network. There is also disclosed an integrated circuit including the impedance element, and a method of manufacturing and configuring the impedance element.

In a multi-directional input device, an upward convex spherical trapezoidal portion is provided at a lower end of an operation shaft projecting downward of a lower arm, a receiving portion for the upward convex spherical trapezoidal portion is provided in a case, the receiving portion has a receiving surface configured with a spherical surface having a radius of curvature identical to a radius of curvature of a spherical zone of the upward convex spherical trapezoidal portion, the receiving surface against which the spherical zone of the upward convex spherical trapezoidal portion is pressed downward by a compression coil spring, and the operation shaft is supported to be rotatable around the center of curvature of the receiving surface.

In a multi-directional input device, an upward convex spherical trapezoidal portion is provided at a lower end of an operation shaft projecting downward of a lower arm, a receiving portion for the upward convex spherical trapezoidal portion is provided in a case, the receiving portion has a receiving surface configured with a spherical surface having a radius of curvature identical to a radius of curvature of a spherical zone of the upward convex spherical trapezoidal portion, the receiving surface against which the spherical zone of the upward convex spherical trapezoidal portion is pressed downward by a compression coil spring, and the operation shaft is supported to be rotatable around the center of curvature of the receiving surface.

A method for manufacturing a chip component includes forming an element, which includes a plurality of element parts, on a substrate. A plurality of fuses are formed, for disconnectably connecting each of the plurality of element parts to an external connection electrode. The external connection electrode, which is arranged to provide external connection for the element, is formed by electroless plating on the substrate.

A method for manufacturing a chip component includes forming an element, which includes a plurality of element parts, on a substrate. A plurality of fuses are formed, for disconnectably connecting each of the plurality of element parts to an external connection electrode. The external connection electrode, which is arranged to provide external connection for the element, is formed by electroless plating on the substrate.

An electrical resistor element, system, and method related thereto, wherein the electrical resistor element includes a tunable resistance. The electrical resistor element comprises a first contact electrode, a second contact electrode and a ferroelectric layer arranged between the first contact electrode and the second contact electrode. The ferroelectric layer comprises a first area having a first polarization direction and a second area having a second polarization direction. The first polarization direction is different to the second polarization direction. The ferroelectric layer further comprises a domain wall between the first area and the second area. The electrical resistor element further comprises a first pinning element configured to stabilize the first polarization direction of the ferroelectric layer. The electrical resistor element further comprises a control circuit configured to tune the resistance of the electrical resistor element by applying electrical pulses to the ferroelectric layer such that the ferroelectric domain wall is moved.

An electrical resistor element, system, and method related thereto, wherein the electrical resistor element includes a tunable resistance. The electrical resistor element comprises a first contact electrode, a second contact electrode and a ferroelectric layer arranged between the first contact electrode and the second contact electrode. The ferroelectric layer comprises a first area having a first polarization direction and a second area having a second polarization direction. The first polarization direction is different to the second polarization direction. The ferroelectric layer further comprises a domain wall between the first area and the second area. The electrical resistor element further comprises a first pinning element configured to stabilize the first polarization direction of the ferroelectric layer. The electrical resistor element further comprises a control circuit configured to tune the resistance of the electrical resistor element by applying electrical pulses to the ferroelectric layer such that the ferroelectric domain wall is moved.

Provided is a variable resistance circuit in which the resistance value of the variable resistance circuit can be accurately adjusted, by reducing the error in the change amount of the resistance value of the variable resistance circuit due to the on-resistances of switch circuits even if the switch circuits that each bypass a resistor included in a ladder resistor circuit are switched between an OFF state and an ON state. This variable resistance circuit includes: a ladder resistor circuit including a plurality of resistors; a first switch circuit connected in series to one end of one resistor of the plurality of resistors; and a second switch circuit connected in parallel to a series circuit of the one resistor and the first switch circuit. When one of the first and second switch circuits is turned on, the other of the first and second switch circuits is turned off.