A MOV device including a MOV chip, a first base metal electrode disposed on a first side of the MOV chip, and a second base metal electrode disposed on a second side of the MOV chip opposite the first side, each of the first base metal electrode and the second base metal electrode including a first base metal electrode layer disposed on a surface of the MOV chip and formed of one of silver, copper, and aluminum, the first base metal electrode layer having a thickness in a range of 2-200 micrometers, and a second base metal electrode layer disposed on a surface of the first base metal electrode layer and formed of one of silver, copper, and aluminum, the second base metal electrode layer having a thickness in a range of 2-200 micrometers.

A chip resistor is capable of improving surge characteristic while finely adjusting a resistance value with high accuracy. A chip resistor includes a resistor which is print-formed such that a first meandering portion is consecutively connected to a second meandering portion across a rectangular adjustment portion. The adjustment portion is provided with a first trimming groove to lengthen a current path of the resistor, thereby improving the surge characteristic while coarsely adjusting a resistance value of the resistor to bring it close to a target resistance value. Furthermore, a second trimming groove is provided in an area of the second meandering portion where a current distribution is small, thereby finely adjusting the resistance value of the resistor to make it coincide with the target resistance value in accordance with a cutting amount of the second trimming groove.

An object is to provide a chip resistor in which hot spots can be dispersed and the adverse effects on performance caused by microcracks can also be reduced. A chip resistor includes an insulating substrate, a resistive element, and electrodes. In the resistive element, a first trimming groove and a second trimming groove are formed. A first vertical groove of the first trimming groove and a second vertical groove of the second trimming groove are formed with a spacing in between in an X1-X2 direction. A first horizontal groove of the first trimming groove and a second horizontal groove of the second trimming groove extend in directions approaching each other, and terminal ends of the first horizontal groove and the second horizontal groove are formed to be separated in the X1-X2 direction such that the first horizontal groove and the second horizontal groove do not overlap in a Y1-Y2 direction.

Structures for an on-chip resistor and methods of forming a structure for an on-chip resistor. The structure includes a first resistor body and a second resistor body coupled to the first resistor body. The first resistor body contains a first material having a first drift effect. The second resistor body contains a second material having a second drift effect that is different from the first drift effect.

In an embodiment a sensor device includes a sensor chip having a plurality of printed ceramic layers and unprinted ceramic layers, at least one termination layer configured to make electrical contact with an electrically conductive material, wherein the termination layer is formed at least on a top side and/or on a bottom side of the sensor chip, wherein the printed ceramic layers are at least partially printed with an electrically conductive material, and wherein an electrical resistance of the sensor chip is determined by an overlap area of the electrically conductive material or by a distance of the electrically conductive material from the termination layer and at least one damping layer directly located at at least a partial area of an outer surface of the sensor chip, wherein the damping layer includes a material which has a greater elasticity than a material of the termination layer.

A chip resistor with a reduced thickness is provided. The chip resistor includes an insulating substrate, a resistor embedded in the substrate, a first electrode electrically connected to the resistor, and a second electrode electrically connected to the resistor. The first electrode and the second electrode are spaced apart from each other in a lateral direction that is perpendicular to the thickness direction of the substrate.

A chip resistor including: a rectangular parallelepiped insulating substrate; a strip-shaped resistor; a pair of front electrodes formed on a front surface of the resistor at both ends in the longitudinal direction; an insulating protective layer; and a pair of end face electrodes formed at both ends of the insulating substrate in the longitudinal direction, each of which is connected to each end face of the resistor, corresponding one of the front electrodes, and protective film; and a pair of external electrodes, wherein a cross-sectional shape of each of the front electrodes is almost a triangle in which a side of the end face has a maximum height, and a shape of an end face of each of the end face electrodes is almost a square.

A chip resistor structure includes a substrate; a pair of first electrodes disposed opposite to each other on a first surface of the substrate at a first interval; a resistance layer disposed between the pair of first electrodes on the first surface; a spacer layer made of a material having a composition different from that of the resistance layer, disposed over the pair of first electrodes; a protective layer overlying the resistance layer; and a plating layer electroplated onto the pair of first electrodes and the spacer layer, and having ends extending beyond the pair of first electrodes terminate at least over the spacer layer. The plating layer may be joined with or spaced from or climb up to the protective layer on or above the spacer layer.

A chip resistor includes: an insulating substrate; a pair of front electrodes; a resistor connecting between both the front electrodes; an undercoat layer provided on the resistor; an overcoat layer provided on the undercoat layer, an auxiliary film provided so as to be over a connecting portion between the front electrode and the resistor at a position away from an end face of the insulating substrate; a pair of end face electrodes; and a pair of external plating layers covering the end face electrodes, the front electrodes, and the auxiliary film, wherein the auxiliary film is formed of a resin material containing metal particles, and a portion of the auxiliary film is sandwiched between the undercoat layer and the overcoat layer.

Resistive elements are formed in belt shape in regions sandwiched between secondary division prediction lines set onto a large substrate and extending in a direction orthogonal to primary division prediction lines, a plurality of front electrodes disposed facing each other at predetermined intervals on the resistive elements are formed so as to be across the primary division prediction lines, a glass coat layer covering each of the resistive elements and extending in the direction orthogonal to the secondary division prediction lines is formed, a resin coat layer covering an entire surface of the large substrate from a top of the glass coat layer is formed, and after that, the large substrate is diced along the primary division prediction lines and the secondary division prediction lines to obtain individual chip base bodies.