Electrical fuse (eFuse) and resistor structures and methods of manufacture are provided. The method includes forming metal gates having a capping material on a top surface thereof. The method further includes protecting the metal gates and the capping material during an etching process which forms a recess in a dielectric material. The method further includes forming an insulator material and metal material within the recess. The method further includes forming a contact in direct electrical contact with the metal material.

A highly reliable surface-mounted resistor, which prevents a problem of disconnection between an electrode and a terminal of a chip resistor when heating during mounting, is disclosed. The surface-mounted resistor includes a chip resistor comprising a plate-shaped substrate, a resistance body formed on an upper surface of the substrate, and an electrode connected the resistance body and drawn from the upper surface of the substrate to a lower surface via an end surface, a plate-shaped lead terminal connected to the electrode of the chip resistor, the plate-shaped lead terminal being fixed to the electrode of the substrate on the lower surface side, and an exterior member covering an entire chip resistor and a part of the lead terminal.

A PPTC assembly may include a PPTC component, having a trip temperature, and further comprising a first temperature coefficient of resistance, in a low temperature range below the trip temperature. The PPTC assembly may include a resistive component, disposed in electrical contact with the PPTC component on a first side of the PPTC component, the resistive component comprising an electrical conductor, and having a second temperature coefficient of resistance in the low temperature range, less than the first temperature coefficient of resistance. The PPTC component may include a first electrode, electrically coupled to the first side of the PPTC component, and a second electrode, electrically coupled to the second side of the PPTC component, where the PPTC component and the resistive component are arranged in electrical series between the first electrode and the second electrode.

A resistor component includes an insulating substrate; a resistance layer disposed on one surface of the insulating substrate; and first and second terminals disposed on the insulating substrate to be spaced apart from each other and connected to the resistance layer, wherein each the first and second terminals comprises an inner electrode layer disposed on the resistance layer, and a via electrode penetrating the resistance layer to be in contact with the one surface of the insulating substrate and the inner electrode layer.

A resistor component includes an insulating substrate having one surface and the other surface and one end surface and the other end surface, a slit portion disposed on the one end surface and the other end surface and extending to the one surface and the other surface, a resistor layer disposed on the one surface, and a first terminal and a second terminal connected to the resistor layer. The first and second terminals include: an internal electrode layer including an upper electrode disposed on the one surface, a lower electrode disposed on the other surface, and a slit electrode disposed on an internal wall of the slit portion, and an external electrode layer disposed on the one end surface, the other end surface, and the internal wall of the slit portion, being in contact with the slit electrode, having a thickness less than a thickness of the internal electrode layer.

A process is provided for forming an integrated thin film resistor (TFR) in an integrated circuit (IC) device including IC elements and IC element contacts. A TFR film layer and TFR dielectric layer are formed over the IC structure, and a wet etch is performed to define a dielectric cap with sloped lateral edges over the TFR film layer. Exposed portions of the TFR film layer are etched to define a TFR element. A TFR contact etch forms contact openings over the TFR element, and a metal layer is formed to form metal layer connections to the IC element contacts and the TFR element. The sloped edges of the dielectric cap may improve the removal of metal adjacent the TFR element to prevent electrical shorts in the completed device. A TFR anneal to reduce a TCR of the TFR is performed at any suitable time before forming the metal layer.

A resistor component includes an insulating substrate; a resistance layer disposed on a first surface of the insulating layer; and first and second terminals, spaced apart from each other, disposed on an external surface of the insulating substrate and connected to the resistance layer; a marking pattern portion disposed on a second surface of the insulating layer, opposing the first surface of the insulating substrate; and a marking protection layer disposed on the second surface and covering the marking pattern portion.

[Object] A method for efficiently manufacturing chip resistors is provided.

[Means] The method includes the steps of preparing at least three conductive elongated boards 711 made of an electrically conductive material and a resistive member 702 made of a resistive material, arranging the at least three conductive elongated boards 711 apart from each other along a width direction crossing a longitudinal direction in which one of the at least three conductive elongated boards 711 is elongated, forming a resistor aggregate 703 by bonding the resistive member 702 to the at least three conductive elongated boards 711, and collectively dividing the resistor aggregate 703 into a plurality of chip resistors by punching so that each of the chip resistors includes two electrodes and a resistor portion bonded to the two electrodes.

A chip resistor includes a substrate, a resistor layer, a first conductive layer, an insulating layer, a second conductive layer, a third conductive layer, and a fourth conductive layer. The first conductive layer is electrically connected to the resistor layer. The insulating layer covers the resistor layer and the first conductive layer. The second conductive layer covers the first conductive layer and the insulating layer. The third conductive layer covers the second conductive layer and the insulating layer. The fourth conductive layer covers the second conductive layer and the third conductive layer. Bonding strength between the third and fourth conductive layer is stronger than that between the second and fourth conductive layer.

Even with the occurrence of misalignment of inner electrodes in a ceramic collective board, a multilayer electronic component is made in which inner electrodes are disposed at suitable positions. Disclosed herein are descriptions of a first-stage ceramic collective board and a second-stage ceramic collective board used for manufacturing a multilayer electronic component. The present disclosure further describes a manufacturing method for the second-stage ceramic collective board and a manufacturing method for a multilayer electronic component.