A packaging substrate can include a first surface and a second opposing surface, the first surface having a mounting region configured to receive electronic components, and electrical contacts formed on the second opposing surface. A saw street region can surround the mounting region and the electrical contacts, a metal layer and a solder mask layer being formed within the saw street region on the second opposing surface, and the solder mask layer being formed over the metal layer. An electronic module can include a packaging substrate including a first surface and a second opposing surface, the first surface including a mounting region. A plurality of electronic components can be mounted on the mounting region. A ground pad can be formed on the second opposing surface of the packaging substrate, the ground pad including a solder mask layer formed thereon, the solder mask layer having a plurality of openings.

To provide a display device including a flexible panel that can be handled without seriously damaging a driver circuit or a connecting portion between circuits. The display device includes a bent portion obtained by bending an element substrate. A circuit for driving the display device is provided in the bent portion and a wiring extends from the circuit, whereby the strength of a portion including the circuit for driving the display device is increased and failure of the circuit is reduced. Furthermore, the element substrate is bent in a connecting portion between an external terminal electrode and an external connecting wiring (FPC) so that the element substrate provided with the external terminal electrode fits the external connecting wiring, whereby the strength of the connecting portion is increased.

A chip part includes a substrate, an element formed on the substrate, and an electrode formed on the substrate. A recess and/or projection expressing information related to the element is formed at a peripheral edge portion of the substrate.

Disclosed herein are methods for making a thin film device and/or for reducing warp in a thin film device, the methods comprising applying at least one metal film to a convex surface of a glass substrate, wherein the glass substrate is substantially dome-shaped. Other methods disclosed include methods of determining the concavity of a glass sheet. The method includes determining the orientation of the concavity and measuring a magnitude of the edge lift of the sheet when the sheet is supported by a flat surface and acted upon by gravity. Thin film devices made according to these methods and display devices comprising such thin film devices are also disclosed herein.

The present invention relates to an improved electronic circuit, as well as an improved substrate with electronic circuits, with an identification pattern. The invention makes it possible to make them identifiable and amongst other things to retrace the circuit(s) in this way through the production process. Furthermore, the invention relates to an improved production method for circuits and substrates according to the invention.

Electronic devices are manufactured using a collective (wafer-scale) fabrication process. Electronic chips are mounted onto one face of a collective substrate wafer. A collective flexible sheet made of a heat-conductive material comprising a layer containing pyrolytic graphite is fixed to extend over a collective region extending over the electronic chips and over the collective substrate wafer between the electronic chips. The collective flexible sheet is then compressed. A dicing operation is then carried out in order to obtain electronic devices each including an electronic chip, a portion of the collective plate and a portion of the collective flexible sheet.

A semiconductor structure includes filled dual reinforcing trenches that reduce curvature of the semiconductor structure by stiffening the semiconductor structure. The filled dual reinforcing trenches reduce curvature by acting against transverse loading, axial loading, and/or torsional loading of the semiconductor structure that would otherwise result in semiconductor structure curvature. The filled dual reinforcing trenches may be located in an array throughout the semiconductor structure, in particular locations within the semiconductor structure, or at the perimeter of the semiconductor structure.

A coating for protecting a wafer from moisture and debris due to dicing, singulating, or handling the wafer is provided. A semiconductor sensor device comprises a wafer having a surface and at least one trench feature and the protective coating covering the trench feature. The trench feature comprises a plurality of walls and the walls are covered with the protective coating, wherein the walls of the trench feature are formed as a portion of the semiconductor sensor device. The semiconductor sensor device further comprises a patterned mask formed on the wafer before the trench feature is formed, wherein the protective coating is formed directly to the trench feature and the patterned mask. The semiconductor sensor device is selected from a group consisting of a MEMS die, a sensor die, a sensor circuit die, a circuit die, a pressure die, an accelerometer, a gyroscope, a microphone, a speaker, a transducer, an optical sensor, a gas sensor, a bolometer, a giant megnetoresistive sensor (GMR), a tunnel magnetoresistive (TMR) sensor, an environmental sensor, and a temperature sensor.

A method for manufacturing a circuit redistribution structure includes the following steps. A first dielectric is formed on a carrier. Conductive blind vias are formed in the first dielectric. A first circuit redistribution layer is formed on the first dielectric. A second dielectric is formed on the first dielectric. First and second holes are formed on the second dielectric. A trench is formed in the second dielectric to divide the second dielectric into first and second portions. A first portion of the first circuit redistribution layer and the first hole are disposed in the first portion of the second dielectric, and a second portion of the first circuit redistribution layer and the second hole are disposed in the second portion of the second dielectric. Conductive blind vias are formed in the first and second holes, and a second circuit redistribution layer is formed on the second dielectric.

A semiconductor device includes a chip, a first kerf adjacent the chip and having a first main direction, a second kerf adjacent the chip and having a second main direction. A kerf junction is formed by the first kerf and the second kerf. A crack stop barrier is located along a first portion of a perimeter of the kerf junction.