Patent classifications
H01L24/71
Edge cut debond using a temporary filler material with no adhesive properties and edge cut debond using an engineered carrier to enable topography
A semiconductor device assembly that includes a first side of a semiconductor device supported on a substrate to permit the processing of a second side of the semiconductor device. A filler material deposited on the semiconductor device supports the semiconductor device on the substrate. The filler material does not adhere to the semiconductor device or the substrate. Alternatively, the filler material may be deposited on the substrate. Instead of a filler material, the substrate may include a topography configured to support the semiconductor device. Adhesive applied between an outer edge of the first side of the semiconductor and the substrate bonds the outer edge of the semiconductor device to the substrate to form a semiconductor device assembly. A second side of the semiconductor device may then be processed and the outer edge of the semiconductor device may be cut off to release the semiconductor device from the assembly.
SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICE
A semiconductor device is provided with a semiconductor element having a plurality of electrodes, a plurality of terminals electrically connected to the plurality of electrodes, and a sealing resin covering the semiconductor element. The sealing resin covers the plurality of terminals such that a bottom surface of the semiconductor element in a thickness direction is exposed. A first terminal, which is one of the plurality of terminals, is disposed in a position that overlaps a first electrode, which is one of the plurality of electrodes, when viewed in the thickness direction. The semiconductor device is provided with a conductive connection member that contacts both the first terminal and the first electrode.
Edge Cut Debond Using a Temporary Filler Material With No Adhesive Properties and Edge Cut Debond Using an Engineered Carrier to Enable Topography
A semiconductor device assembly that includes a first side of a semiconductor device supported on a substrate to permit the processing of a second side of the semiconductor device. A filler material deposited on the semiconductor device supports the semiconductor device on the substrate. The filler material does not adhere to the semiconductor device or the substrate. Alternatively, the filler material may be deposited on the substrate. Instead of a filler material, the substrate may include a topography configured to support the semiconductor device. Adhesive applied between an outer edge of the first side of the semiconductor and the substrate bonds the outer edge of the semiconductor device to the substrate to form a semiconductor device assembly. A second side of the semiconductor device may then be processed and the outer edge of the semiconductor device may be cut off to release the semiconductor device from the assembly.
Semiconductor device and method for manufacturing semiconductor device to prevent separation of terminals
A semiconductor device is provided with a semiconductor element having a plurality of electrodes, a plurality of terminals electrically connected to the plurality of electrodes, and a sealing resin covering the semiconductor element. The sealing resin covers the plurality of terminals such that a bottom surface of the semiconductor element in a thickness direction is exposed. A first terminal, which is one of the plurality of terminals, is disposed in a position that overlaps a first electrode, which is one of the plurality of electrodes, when viewed in the thickness direction. The semiconductor device is provided with a conductive connection member that contacts both the first terminal and the first electrode.
LOCALIZED DAMPING ELEMENTS FOR MITIGATING INTERCONNECT VIBRATION DAMAGE
Damping structures in integrated circuit (IC) devices, and techniques for forming the structures are discussed. An IC device includes, between an IC package and a socket, both a spring force and a damping structure adjacent an array of pins and corresponding lands. The damping structure may be of a dissipative, viscous, or viscoelastic material. The damping structure may be between the IC package and socket. The damping structure may be within a periphery of the socket. The damping structure may be coupled to the IC package or the socket by an adhesive or a press fit. A heatsink or a heat spreader may be coupled to the IC package over the socket.
Semiconductor device having stacked semiconductor chips interconnected via TSV
A semiconductor device includes at least first and second semiconductor chips stacked on each other along a first direction, at least one through-silicon-via (TSV) through at least the first semiconductor chip of the first and second semiconductor chips, a contact pad on the at least one TSV of the first semiconductor chip, the contact pad electrically connecting the TSV of the first semiconductor chip to the second semiconductor chip, and a plurality of dummy pads on the first semiconductor chip, the plurality of dummy pads being spaced apart from each other and from the contact pad along a second direction, and the dummy pads having same heights as the contact pads as measured between respective top and bottom surfaces along the first direction.
METHOD FOR DIRECT BONDING OF SUBSTRATES INCLUDING THINNING OF THE EDGES OF AT LEAST ONE OF THE TWO SUBSTRATES
A method for direct bonding between at least a first and a second substrate, each of the first and second substrates containing a first and a second main surface, the method including: a first thinning of the edges of the first substrate over at least one portion of the circumference of the first substrate, at the first main surface of the first substrate; and placing the second main surface of the first substrate in contact with the second main surface of the second substrate such that a bonding wave propagates between the first and second substrates, securing the first and second substrates to one another by direct bonding such that portions of the second main surface of the first substrate located below the thinned portions of the first main surface of the first substrate are secured to the second substrate.
Semiconductor Device Having Stacked Semiconductor Chips Interconnected Via TSV
A semiconductor device includes at least first and second semiconductor chips stacked on each other along a first direction, at least one through-silicon-via (TSV) through at least the first semiconductor chip of the first and second semiconductor chips, a contact pad on the at least one TSV of the first semiconductor chip, the contact pad electrically connecting the TSV of the first semiconductor chip to the second semiconductor chip, and a plurality of dummy pads on the first semiconductor chip, the plurality of dummy pads being spaced apart from each other and from the contact pad along a second direction, and the dummy pads having same heights as the contact pads as measured between respective top and bottom surfaces along the first direction.
Semiconductor device having stacked semiconductor chips interconnected via TSV and method of fabricating the same
A semiconductor device includes at least first and second semiconductor chips stacked on each other along a first direction, at least one silicon-through-via (TSV) through at least the first semiconductor chip of the first and second semiconductor chips, a contact pad on the at least one TSV of the first semiconductor chip, the contact pad electrically connecting the TSV of the first semiconductor chip to the second semiconductor chip, and a plurality of dummy pads on the first semiconductor chip, the plurality of dummy pads being spaced apart from each other and from the contact pad along a second direction, and the dummy pads having same heights as the contact pads as measured between respective top and bottom surfaces along the first direction.
SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICE
A semiconductor device is provided with a semiconductor element having a plurality of electrodes, a plurality of terminals electrically connected to the plurality of electrodes, and a sealing resin covering the semiconductor element. The sealing resin covers the plurality of terminals such that a bottom surface of the semiconductor element in a thickness direction is exposed. A first terminal, which is one of the plurality of terminals, is disposed in a position that overlaps a first electrode, which is one of the plurality of electrodes, when viewed in the thickness direction. The semiconductor device is provided with a conductive connection member that contacts both the first terminal and the first electrode.