A switching device has a substrate, a connection device and a pressure device, wherein the substrate has electrically insulated conductor tracks, and a power semiconductor component is on one of the conductor tracks with a first main surface and is conductively connected thereto. The connection device is a film composite with conductive film and an insulating film and forms a first and a second main surface. The switching device is connected by the connection device and a contact area of the second main surface of the power semiconductor component is connected to a first contact area of the first main surface of the connection device in a force-locking and electrically conductive manner with a pressure body and a pressure element projecting toward the power semiconductor component.

A solar cell module and a method for manufacturing the same are disclosed. The solar cell module includes a plurality of cell cutting pieces stacked and connected in series, and a connector adapted to connect two adjacent cell cutting pieces in series, the plurality of cell cutting pieces being cut from a solar cell, each cell cutting piece including a front electrode and a back electrode, wherein the connector includes a first surface adapted to connect the front electrode and a second surface adapted to connect the back electrode, the first surface is provided with alternating first connecting areas and first disconnecting areas, the second surface is provided with alternating second connecting areas and second disconnecting areas, and projections of the first disconnecting areas on the first surface overlap with projections of the second connecting areas on the first surface, and wherein the front electrode is adapted to connect the first connecting areas, and the back electrode is adapted to connect the second connecting areas. The solar cell module has improved flexibility, in which grid lines and cells are not easy to be broken.

A device comprises a surface mount component on a substrate, in which the surface mount component is attached by a set of discrete mechanical coupling parts and by a bonding layer. This enables the mechanical coupling properties and the electrical/thermal properties to be optimized separately.

At least one aspect is directed to a IC socket with impedance-controlled signal lines. The IC socket includes a first plurality of signal contacts configured to make electrical connections to leads of an integrated circuit, a second plurality of signal contacts configured to make electrical connections to pads of a printed circuit board, a substrate disposed between the first and second pluralities of signal contacts, and a plurality of signal lines passing through the substrate. The substrate comprises a plurality of layers, the layers alternating between dielectric layers and at least one conductor layer. Each signal line electrically connects a first signal contact of the first plurality of signal contacts with a second signal contact of the second plurality of signal contacts. Each conductor layer defines a gap around each signal line. The proximity of each signal line to each conductor layer creates a capacitance between the two.

A solar cell module includes: an at least one solar cell disposed between a first cover and a second cover; a sealing material that fills a gap between the first cover and the second cover to join them together, and seals the solar cell; and a tab line as a conductor electrically connected to the solar cell and enclosed by the sealing material between the first cover and the second cover, the tab line having a plurality of bases, and an expansion and contraction portion that can expand and contract in a longitudinal direction and connects the plurality of bases, the plurality of bases each being provided with a through hole and a connection base electrically connected to the solar cell, at least one of the first cover and the second cover having a boss as a positioning unit that positions the tab line.

A method for direct bonding between at least a first and a second substrate, each of the first and second substrates containing a first and a second main surface, the method including: a first thinning of the edges of the first substrate over at least one portion of the circumference of the first substrate, at the first main surface of the first substrate; and placing the second main surface of the first substrate in contact with the second main surface of the second substrate such that a bonding wave propagates between the first and second substrates, securing the first and second substrates to one another by direct bonding such that portions of the second main surface of the first substrate located below the thinned portions of the first main surface of the first substrate are secured to the second substrate.

One aspect of the invention relates to a chip assemblage. The latter comprises a number of semiconductor chips, each of which has a semiconductor body having an underside, and also a top side, which is spaced apart from the underside in a vertical direction. A top main electrode is arranged on the top side and a bottom main electrode is arranged on the underside. Moreover, each of the semiconductor chips has a control electrode, by means of which an electric current between the top main electrode and the bottom main electrode can be controlled. The semiconductor chips are connected to one another by a dielectric embedding compound to form a solid assemblage. The chip assemblage additionally comprises a common control terminal, and a common reference potential terminal. The common control terminal is electrically conductively connected to each of the control electrodes via a control electrode interconnection structure, and the common reference potential terminal is electrically conductively connected to each of the first main electrodes via a main electrode interconnection structure. Moreover, a dedicated, electrically conductive top compensation lamina is present for each of the semiconductor chips, said top compensation lamina being arranged on that side of the top main electrode which faces away from the semiconductor body and being cohesively and electrically conductively connected to the top main electrode.

A semiconductor power device is disclosed. The semiconductor power device comprises a lead frame unit, two or more pluralities of single in-line leads, two or more semiconductor chip stacks, and a molding encapsulation. Each semiconductor chip stack includes a high-side semiconductor chip, a low-side semiconductor chip and a clip connecting a top surface of the high-side semiconductor chip to a bottom surface of the low-side semiconductor chip. This invention further discloses a method for fabricating semiconductor power devices. The method comprises the steps of providing a lead frame strip having a plurality of lead frame units; providing two or more pluralities of single in-line leads; attaching two or more high-side semiconductor chips to each lead frame unit; connecting each of the two or more high-side semiconductor chips to a respective lead by a respective clip of two or more first clips; attaching a respective low-side semiconductor chip of the two or more low-side semiconductor chips to each clip of the two or more first clips; molding an encapsulation; and singulating the lead frame strip and the encapsulation to form the semiconductor power devices.

An apparatus includes a base, an integrated circuit (IC), a thermal interface material (TIM) disposed on the IC, and a heat sink. The heat sink has a vapor chamber (VC) and a condenser coupled with, and spaced from, the VC. The condenser also has a mounting arm extending outward to a side of the condenser. The apparatus further includes a mounting bracket that couples the condenser with the base. The mounting bracket defines one or more oblong holes to accommodate respective horizontally-oriented fasteners that secure the mounting arm to the mounting bracket in such a way that the condenser is oriented and positioned at a height that enables the VC to be arranged on the TIM in a neutral position. A method of assembling such an apparatus is also disclosed.

In an embodiment, a device includes: a package component including integrated circuit dies, an encapsulant around the integrated circuit dies, a redistribution structure over the encapsulant and the integrated circuit dies, and sockets over the redistribution structure; a mechanical brace physically coupled to the sockets, the mechanical brace having openings, each one of the openings exposing a respective one of the sockets; a thermal module physically and thermally coupled to the encapsulant and the integrated circuit dies; and bolts extending through the thermal module, the mechanical brace, and the package component.