H01L24/93

Power semiconductor device and method for manufacturing same

In a power semiconductor device, an IGBT has a collector electrode bonded to a metal plate by a bonding material. A diode has a cathode electrode bonded to the metal plate by the bonding material. An interconnection member is bonded to an emitter electrode of the IGBT by a bonding material. The bonding material includes a bonding material and a bonding material. The bonding material is interposed between the IGBT and the interconnection member. The bonding material fills a through hole formed in the interconnection member. The bonding material reaches the bonding material and is therefore connected to the bonding material.

LAMINATING STRUCTURE OF ELECTRONIC DEVICE USING TRANSFERRING ELEMENT, TRANSFERRING APPARATUS FOR FABRICATING THE ELECTRONIC DEVICE AND METHOD FOR FABRICATING THE ELECTRONIC DEVICE

A laminating structure of an electronic device using a transferring element according to the present disclosure includes a target substrate, a bottom electrode formed on the target substrate, an electronic device which is bonded to the bottom electrode, a top contact formed on the electronic device, a transferring element which is placed between the bottom electrode and the electronic device on the target substrate, and a top electrode connected to the electronic device, wherein the transferring element attached to the carrier substrate comes into contact with the electronic device, and is then transferred onto the target substrate.

Electrical redundancy for bonded structures

An element that is configured to bond to another element is disclosed. A first element that can include a first plurality of contact pads on a first surface. The first plurality of contact pads includes a first contact pad and a second contact pad that are spaced apart from one another. The first and second contact pads are electrically connected to one another for redundancy. The first element can be prepared for direct bonding. The first element can be bonded to a second element to form a bonded structure. The second element has a second plurality of contact pads on a second surface. At least one of the second plurality of contact pads is bonded and electrically connected to at least one of the first plurality of contact pads.

Display panel, preparation method thereof, and display device

Provided are a display panel, a preparation method thereof, and a display device. The display panel includes a plurality of sub-panels. Each sub-panel includes first substrate, second substrate, bezel adhesive located therebetween, a plurality of bank structures, and a plurality of light-emitting elements. At least one light-emitting element forms a pixel unit. Each bank structure is located between adjacent pixel units. Seaming adhesive is located between adjacent sub-panels. The sub-panels share a same first substrate, and the seaming adhesive is disposed on the same first substrate. The first substrate includes a display region and a non-display region surrounding the display region. The light-emitting elements and the bank structures are located in the display region, and the bezel adhesive is located in the non-display region. In this manner, splicing gaps between adjacent sub-panels can be effectively reduced, and thus the display effect of the display panel can be improved.

Suspended semiconductor dies

In examples, an electronic device comprises a printed circuit board (PCB), an orifice extending through the PCB, and a semiconductor die suspended above the orifice by aluminum bond wires. The semiconductor die is vertically aligned with the orifice and the bond wires coupled to the PCB.

Pre-plating of solder layer on solderable elements for diffusion soldering

A pre-soldered circuit carrier includes a carrier having a metal die attach surface, a plated solder region on the metal die attach surface, wherein a maximum thickness of the plated solder region is at most 50 ?m, the plated solder region has a lower melting point than the first bond pad, and the plated solder region forms one or more intermetallic phases with the die attach surface at a soldering temperature that is above the melting point of the plated solder region.

Vacuum lamination method for forming a conformally coated article and associated conformally coated articles formed therefrom

Vacuum lamination methods for forming conformally coated articles having a preformed lamination layer conformally coated to or on an object such as an LED array are provided. These vacuum lamination methods utilize a single heating step to heat a middle portion of the preformed lamination layer to a flowable condition prior to the preformed lamination layer being conformally coated over the article, such as the array of light emitting diodes disposed on an inner portion of a first side of a submount wafer.

WORKPIECE PROCESSING METHOD
20180308711 · 2018-10-25 ·

A processing method for a plate-shaped workpiece that has a transparent substrate, a first resin layer stacked on a front surface of the substrate, and a second resin layer stacked on a back surface of the substrate and in which the first resin layer is segmented into plural regions by plural planned dividing lines that intersect each other, includes sticking an expandable adhesive tape to the second resin layer, irradiating the workpiece with a laser beam with such a wavelength as to be absorbed by the first resin layer and transmitted through the transparent substrate, the laser beam removing the first resin layer along the planned dividing lines by ablation, the laser beam also forming a modified layer whose refractive index or mechanical strength is different from surroundings along the planned dividing lines.

Micro electro mechanical system, semiconductor device, and manufacturing method thereof

The present invention provides a MEMS and a sensor having the MEMS which can be formed without a process of etching a sacrifice layer. The MEMS and the sensor having the MEMS are formed by forming an interspace using a spacer layer. In the MEMS in which an interspace is formed using a spacer layer, a process for forming a sacrifice layer and an etching process of the sacrifice layer are not required. As a result, there is no restriction on the etching time, and thus the yield can be improved.

Method for Transferring and Placing a Semiconductor Device on a Substrate

An example embodiment may include a method for placing on a carrier substrate a semiconductor device. The method may include providing a semiconductor substrate comprising a rectangular shaped assist chip, which may include at least one semiconductor device surrounded by a metal-free border. The method may also include dicing the semiconductor substrate to singulate the rectangular shaped assist chip. The method may further include providing a carrier substrate having adhesive thereon. The method may additionally include transferring to and placing on the carrier substrate the rectangular shaped assist chip, thereby contacting the adhesive with the rectangular shaped assist chip at least at a location of the semiconductor device. The method may finally include singulating the semiconductor device, while remaining attached to the carrier substrate by the adhesive, by removing a part of rectangular shaped assist chip other than the semiconductor device.