H01L24/98

Methods for repackaging copper wire-bonded microelectronic die
09799617 · 2017-10-24 · ·

Methods for repacking copper wire bonded microelectronic die (that is, die having bond pads bonded to copper wire bonds) are provided. In one embodiment, the repackaging method includes the step or process of obtaining a microelectronic package containing copper wire bonds and a microelectronic die, which includes bond pads to which the copper wire bonds are bonded. The microelectronic die is extracted from the microelectronic package in a manner separating the copper wire bonds from the bond pads. The microelectronic die is then attached or mounted to a Failure Analysis (FA) package having electrical contact points thereon. Electrical connections are then formed between the bond pads of the microelectronic die and the electrical contact points of the FA package at least in part by printing an electrically-conductive material onto the bond pads.

Conductive connections, structures with such connections, and methods of manufacture
09793198 · 2017-10-17 · ·

A solder connection may be surrounded by a solder locking layer (1210, 2210) and may be recessed in a hole (1230) in that layer. The recess may be obtained by evaporating a vaporizable portion (1250) of the solder connection. Other features are also provided.

PRESSURE-ACTIVATED ELECTRICAL INTERCONNECTION BY MICRO-TRANSFER PRINTING

A printed electrical connection structure includes a substrate having one or more electrical connection pads and a micro-transfer printed component having one or more connection posts. Each connection post is in electrical contact with a connection pad. A resin is disposed between and in contact with the substrate and the component. The resin has a reflow temperature less than a cure temperature. The resin repeatedly flows at the reflow temperature when temperature-cycled between an operating temperature and the reflow temperature but does not flow after the resin is exposed to a cure temperature. A solder can be disposed on the connection post or the connection pad. After printing and reflow, the component can be tested and, if the component fails, another component is micro-transfer printed to the substrate, the resin is reflowed again, the other component is tested and, if it passes the test, the resin is finally cured.

SEMICONDUCTOR PACKAGE AND REWORK PROCESS FOR THE SAME

An embodiment is a method including bonding a first package to a first set of conductive pads of a second package with a first set of solder joints, testing the first package for defects, heating the first set of solder joints by directing a laser beam at a surface of the first package based on testing the first package for defects, after the first set of solder joints are heated, removing the first package, and bonding a third package to the first set of conductive pads of the second package.

Structures and methods for reliable packages

A device and method of forming the device that includes cavities formed in a substrate of a substrate device, the substrate device also including conductive vias formed in the substrate. Chip devices, wafers, and other substrate devices can be mounted to the substrate device. Encapsulation layers and materials may be formed over the substrate device in order to fill the cavities.

MODULE, METHOD FOR MANUFACTURING THE SAME, AND ELECTRONIC DEVICE
20170330852 · 2017-11-16 ·

A module, comprising an electronic component having a first electrode, a mounting board having a second electrode, a solder-bump configured to connect the first electrode and the second electrode, and a thermoplastic resin member configured to contact both the first electrode and the second electrode and cover the solder-bump, so as to form a space between the electronic component and the mounting board.

Removal apparatuses for semiconductor chips

An apparatus for removing a semiconductor chip from a board may include: a laser configured to irradiate the board with a laser beam to heat bumps mounting the semiconductor chip on the board; a picker configured to separate the semiconductor chip from the board; a vacuum portion configured to provide a vacuum to the picker; and an intake. If solder pillars, that are residues of the bumps, are melted by the laser beam, the intake removes the solder pillars using the vacuum provided from the vacuum portion. An apparatus for removing a semiconductor chip from a board may include: a stage configured to support the board on which the semiconductor chip is mounted by bumps; a laser configured to irradiate the board with a laser beam to heat the bumps mounting the semiconductor chip on the board; and a picker configured to separate the semiconductor chip from the board.

Workpiece-separating device and workpiece-separating method

A workpiece-separating device includes a holding member configured to detachably hold one of a workpiece or a supporting body of a laminated body and a light irradiation part configured to perform light irradiation on a separating layer, the holding member including: a stage facing one of the workpiece or the supporting body, a fixed supporting part projecting from the stage toward the laminated body and including a still suction pad immovable in a projection direction, and a movable supporting part projecting from the stage toward the laminated body and including a response suction pad that is movable in a projection direction and elastically deformable, a plurality of the fixed supporting parts and a plurality of the movable supporting parts disposed in a dispersed manner, and the plurality of response suction pads project toward the laminated body further than the plurality of still suction pads.

Integrated Fan-Out Package Including Voltage Regulators and Methods Forming Same

A method includes adhering a voltage regulator die over a carrier through a die-attach film, with the die-attach film being in the voltage regulator die and encircles metal pillars of the voltage regulator die, encapsulating the voltage regulator die in an encapsulating material, and planarizing the encapsulating material. A back portion of the voltage regulator die is removed to expose a through-via in a semiconductor substrate of the voltage regulator die. The method further includes forming first redistribution lines over the encapsulating material and electrically coupled to the through-via, replacing the die-attach film with a dielectric material, forming second redistribution lines on an opposite side of encapsulating material than the first redistribution lines, and bonding an additional device die to the second redistribution lines. The voltage regulator die is electrically coupled to the additional device die.

METHOD FOR DETECTING COVERAGE RATE OF INTERMETALLIC COMPOUND
20220236195 · 2022-07-28 ·

Disclosed is a method for detecting coverage rate of an intermetallic compound, the method comprising putting a chip subjected to wire bonding into a mixed reagent of fuming nitric acid and fuming sulfuric acid for soaking, wherein the chip subjected to wire bonding comprises a silver wire and an aluminum pad; taking out the chip after the silver wire is removed; and detecting the coverage rate of an intermetallic compound on the aluminum pad.