H01L25/16

SEMICONDUCTOR EMI SHIELDING COMPONENT, SEMICONDUCTOR PACKAGE STRUCTURE AND MANUFACTURING METHOD THEREOF
20230048468 · 2023-02-16 ·

The invention discloses a semiconductor package structure including a package carrier, at least one electronic component, a packaging layer, a support component and a shielding layer. The electronic component is disposed on a first surface of the package carrier. The packaging layer is disposed on the first surface and covers the electronic component. The support component is embedded in the packaging layer to surround the electronic component. An end surface of the support component is electrically connected to a build-up circuit and electrically grounded. A patterned metal layer of the shielding layer is electrically connected to the support component. The shielding range of the patterned metal layer covers at least electronic component. A shielding space, which covers the electronic component, is formed by the support component and the shielding layer. In addition, a semiconductor EMI shielding component and a method of making a semiconductor package structure are also disclosed.

DISPLAY DEVICE AND METHOD FOR MANUFACTURING THE SAME

A display device includes pixel electrodes disposed on a substrate, at least one light-emitting element disposed on each of the pixel electrodes, a planarization layer disposed on the pixel electrodes and filling a space between the at least one light-emitting element, and a common electrode disposed on the planarization layer and the at least one light-emitting element. Each of the light-emitting elements is arranged perpendicular to a top face of each of the pixel electrodes, at least one of the pixel electrodes includes a protrusion protruding toward an adjacent one of the pixel electrodes, and the protrusion overlaps the light-emitting element in a plan view.

SEMICONDUCTOR PACKAGE
20230047026 · 2023-02-16 ·

A semiconductor package includes: a first wiring structure including a first wiring layer, and a second wiring layer disposed on the first wiring layer, and connected to a first connecting structure placed disposed on the first wiring layer; a first semiconductor chip disposed on the first wiring structure and connected to the first wiring structure through a first connecting pad disposed on a first side of the first semiconductor chip; a second wiring structure disposed on the first semiconductor chip; and an insulating member disposed between the first and second wiring structures, wherein the first wiring structure further includes a first signal pattern that is electrically connected to the first connecting pad, and the first signal pattern redistributes the first connecting pad to the first connecting structure via the insulating member.

SEMICONDUCTOR PACKAGE INCLUDING STIFFENER
20230046098 · 2023-02-16 ·

A semiconductor package includes a package substrate, a semiconductor stack on the package substrate, a passive device on the package substrate and spaced apart from the semiconductor stack, and a stiffener on the package substrate and extending around an outer side of the semiconductor stack. The stiffener includes a first step surface extends over the passive device. A width of a bottom surface of the stiffener is smaller than a width of a top surface of the stiffener.

Photo-emitting and/or photo-receiving diode array device

Photo-emitting and/or photo-receiving diode array device, comprising: a stack of first and second semiconductor layers doped according to different types; first trenches passing through the stack and surrounding a region of the stack wherein several diodes are formed; dielectric portions arranged in the first trenches and covering lateral flanks of said region over the entire thickness of the second layer and a first part of the thickness of the first layer; first electrically conductive portions arranged in the first trenches and covering the lateral flanks of said region over a second part of the thickness of the first layer, and forming first electrodes of the diodes of said region; at least one second trench partially passing through the first layer and separating the portions of the first layer from the diodes of said region.

Optoelectronic device
11581295 · 2023-02-14 · ·

A method of manufacturing an optoelectronic device, including the steps of: forming, on a first surface of a first including assemblies of electronic components, a stack of insulating layers and of conductive tracks; forming, on another wafer, light-emitting diodes each comprising ends; forming a metal layer on at least a portion of the surface of the first wafer and another metal layer on at least a portion of the surface of the second wafer, the other metal layer being electrically coupled to the end of each light-emitting diode; placing into contact the metal layers; forming an insulated conductive via connecting another surface of the wafer to a conductive track; and forming insulated conductive trenches surrounding diodes.

Packaged semiconductor device and method of forming thereof

A semiconductor device includes a first die, a second die on the first die, and a third die on the second die, the second die being interposed between the first die and the third die. The first die includes a first substrate and a first interconnect structure on an active side of the first substrate. The second die includes a second substrate, a second interconnect structure on a backside of the second substrate, and a power distribution network (PDN) structure on the second interconnect structure such that the second interconnect structure is interposed between the PDN structure and the second substrate.

Light emitting substrate, light emitting motherboard, method for obtaining light emitting substrate, and displaying device

A light emitting substrate, a light emitting motherboard, a method for obtaining a light emitting substrate, and a displaying device. The light emitting substrate comprises a substrate and multiple light emitting units, wherein the substrate is provided with a light emitting region and a bind region located on one side of the light emitting region; each light emitting unit comprises a light zone provided with at least one light emitting diode and a drive circuit provided with multiple pins, and the multiple light emitting units are arranged on the substrate in an array; a direction pointing from the light emitting region to the bind region is a first direction; and in the first direction, the drive circuit of at least one light emitting unit in the last row of the light emitting units is connected to an address line.

Stretchable display panel and stretchable display device including the same
11581397 · 2023-02-14 · ·

Disclosed herein are a stretchable display panel and a stretchable device. The stretchable display panel comprises: a lower substrate having an active area and a non-active area surrounding the active area; a plurality of individual substrates disposed on the lower substrate, spaced apart from each other and located in the active area; a connection line electrically connecting a pad disposed on the individual substrate; a plurality of pixels disposed on the plurality of individual substrates; and an upper substrate disposed above the plurality of pixels, wherein the modulus of elasticity of the individual substrates is higher than that of at least one part of the lower substrate. Accordingly, the stretchable display device according to the present disclosure may have a structure that enables the stretchable display device to be more easily deformed when a user stretches or bends the stretchable display device and that can minimize damage to the components of the stretchable display device when the stretchable display device is deformed.

Semiconductor package, and package on package having the same

A semiconductor package includes: a redistribution layer including a plurality of redistribution insulating layers, a plurality of redistribution line patterns that constitute lower wiring layers, and a plurality of redistribution vias that are connected to some of the plurality of redistribution line patterns while penetrating at least one of the plurality of redistribution insulating layers; at least one semiconductor chip arranged on the redistribution layer; an expanded layer surrounding the at least one semiconductor chip on the redistribution layer; and a cover wiring layer including at least one base insulating layer, a plurality of wiring patterns that constitute upper wiring layers, and a plurality of conductive vias that are connected to some of the plurality of wiring patterns while penetrating the at least one base insulating layer.