The invention is directed to a method for the production of an optoelectronic module including a support (5) and an additional layer, said support being formed by an assembly (25) which has no optoelectronic properties and which comprises, successively, a metal substrate (27), a dielectric coating (29) disposed on the metal substrate, and an electrically conductive layer (31) disposed on the dielectric coating. The production method comprises: a step of providing the support and performing a method in which the support is checked, or providing the support after it has already been checked; and a step of depositing at least one additional layer on the electrically conductive layer. The method in which support is checked comprises the following steps: electrical excitation of the support by bringing the metal substrate and the electrically conductive layer into electrical contact with a voltage source (33); and photothermal examination of the excited support so as to detect any possible fault (49, 51) located at least partially in the dielectric coating (29) and to provide a photothermal examination result.

A method of manufacturing a semiconductor device includes providing a substrate structure. The substrate structure includes a conductive layer and a plurality of nanopillars spaced apart from each other overlying the conductive layer. Each nanopillar includes a first semiconductor layer and a second semiconductor layer on the first semiconductor layer. The first semiconductor layer and the second semiconductor layer have different conductivity types. The method also includes forming a graphene layer overlying the plurality of nanopillars. The graphene layer is connected to each of the plurality of nanopillars.

An optoelectronic semiconductor component includes an optoelectronic semiconductor chip; and an electrical connection point that contacts the optoelectronic semiconductor chip, wherein the electrical connection point covers the optoelectronic semiconductor chip on the bottom thereof at least in some areas, the electrical connection point includes a contact layer facing toward the optoelectronic semiconductor chip, the electrical connection point includes at least one barrier layer arranged on a side of the contact layer facing away from the optoelectronic semiconductor chip, the electrical connection point includes a protective layer arranged on the side of the at least one barrier layer facing away from the contact layer, the layers of the electrical connection point are arranged one on top of another along a stack direction, and the stack direction runs perpendicular to a main extension plane of the optoelectronic semiconductor chip.

One or more techniques and/or systems are provided for facilitating a shutdown of output power from an energy panel arrangement to an inverter. A shutdown implementation module is coupled between an energy panel arrangement and an inverter that converts DC power from the energy panel arrangement to AC power for an AC power grid. A communication connection is established, over a power-line communication line, between the shutdown implementation module and a shutdown controller associated with the inverter. Responsive to identifying a loss of the communication connection or receiving a shutdown instruction over the power-line communication line, the shutdown implementation module shuts down output power from the energy panel arrangement to the inverter. The shutdown implementation module may be located within a threshold distance from the energy panel arrangement (e.g., within about 10 feet) so that the output power may be shutoff within a threshold timespan (e.g., within about 10 seconds).

A functional panel is provided. The functional panel includes a first substrate, a second substrate, a bonding layer, a functional element, a protective layer, and a terminal. The bonding layer is positioned between the first and second substrates. The functional element is surrounded by the first substrate, the second substrate, and the bonding layer. The terminal is electrically connected to the functional element and provided not to overlap with one of the first and second substrates. The protective layer is provided to be in contact with side surfaces of the first and second substrates and an exposed surface of the bonding layer. A surface of the terminal is partly exposed without being covered with the protective layer. The surface of the terminal partly includes a material having a lower ionization tendency than hydrogen.

An optical sensor includes a substrate having a plurality of first light receiving elements in a surface, and a light blocking film having a plurality of first openings. The first light receiving elements are provided such that a direction of travel of incident light defined by each of the first openings is different from a thickness direction of the substrate and form at least one light receiving element set in which an angle of incidence defined between the direction of travel of the incident light and the thickness direction is the same with respect to the light receiving elements. In a view projected in the thickness direction, a positional relationship between the first light receiving elements included in a light receiving element set and the corresponding first openings has rotational symmetry of order 3 or more about an axis along the thickness direction.

A solar cell includes a semiconductor substrate, a bus-bar electrode, a plurality of finger electrodes, and a heavily doped layer. The semiconductor substrate has a surface. The bus-bar electrode is on the surface of the semiconductor substrate and extending along a first direction. The finger electrodes are on the surface of the semiconductor substrate and extending along a second direction. One of two ends of each of the finger electrodes is connected to the bus-bar electrode. An angle created by the first direction and the second direction is less than 180 degrees. The heavily doped layer is formed on the surface of the semiconductor substrate and includes a first portion and a plurality of second portions. The first portion is extending along the first direction. Each of the second portions is extending from the first portion along the second direction and beneath the corresponding finger electrode.

A photoconductive switch consisting of an optically actuated photoconductive material, e.g. a wide bandgap semiconductor such as SiC, situated between opposing electrodes. The electrodes are created using various methods in order to maximize reliability by reducing resistive heating, current concentrations and filamentation, and heating and ablation due to the light source. This is primarily accomplished by the configuration of the electrical contact geometry, choice of contacts metals, annealing, ion implantation, creation of recesses within the SiC, and the use of coatings to act as encapsulants and anti-reflective layers.

A sensing device includes a substrate, two chips, and a shielding structure. The two chips are respectively defined as an emitting chip and a receiving chip. The emitting chip can emit a sensing light beam, the receiving chip can receive the sensing light beam, and the two chips are fixed in position on the substrate at intervals. At least one of the chips is electrically connected to the substrate through at least one wire, and a position where the wire is connected to the substrate is located between the two chips. The shielding structure is formed on the substrate. The shielding structure is located between the two chips, and the shielding structure covers the wire and a portion of the chip connected to the wire. Compared with the conventional photo-plethysmography sensor, the sensing device has the advantage of a smaller size.

Methods and devices for an avalanche photo-transistor. In one aspect, an avalanche photo-transistor includes a detection region configured to absorb light incident on a first surface of the detection region and generate one or more charge carriers in response, a first terminal in electrical contact with the detection region and configured to bias the detection region, an interim doping region, a second terminal in electrical contact with the interim doping region and configured to bias the interim doping region, a multiplication region configured to receive the one or more charge carriers flowing from the interim doping region and generate one or more additional charge carriers in response, a third terminal in electrical contact with the multiplication region and configured to bias the multiplication region, wherein the interim doping region is located in between the detection region and the multiplication region.