Patent classifications
H01L31/18
WAFER BONDED SOLAR CELLS AND FABRICATION METHODS
A photovoltaic device and method for fabrication include multijunction cells, each cell having a material grown independently from the other and including different band gap energies. An interface is disposed between the cells and configured to wafer bond the cells wherein the cells are configured to be adjacent without regard to lattice mismatch.
WAFER BONDED SOLAR CELLS AND FABRICATION METHODS
A photovoltaic device and method for fabrication include multijunction cells, each cell having a material grown independently from the other and including different band gap energies. An interface is disposed between the cells and configured to wafer bond the cells wherein the cells are configured to be adjacent without regard to lattice mismatch.
OPTO-ELECTRONIC DEVICE WITH TEXTURED SURFACE AND METHOD OF MANUFACTURING THEREOF
Disclosed is an opto-electronic device including a semiconducting substrate, a layered interface including at least one layer, the layered interface having a first surface in contact with a surface of the semiconducting substrate and the layered interface being adapted for passivating the surface of the semiconducting substrate, the layered interface having a second surface and the layered interface being adapted for electrically insulating the first surface from the second surface, and a textured surface structure including a plurality of nanowires and a transparent dielectric coating, the textured surface structure being in contact with the second surface of the layered interface, the plurality of nanowires protruding from the second surface and the plurality of nanowires being embedded between the second surface and the transparent dielectric coating.
OPTO-ELECTRONIC DEVICE WITH TEXTURED SURFACE AND METHOD OF MANUFACTURING THEREOF
Disclosed is an opto-electronic device including a semiconducting substrate, a layered interface including at least one layer, the layered interface having a first surface in contact with a surface of the semiconducting substrate and the layered interface being adapted for passivating the surface of the semiconducting substrate, the layered interface having a second surface and the layered interface being adapted for electrically insulating the first surface from the second surface, and a textured surface structure including a plurality of nanowires and a transparent dielectric coating, the textured surface structure being in contact with the second surface of the layered interface, the plurality of nanowires protruding from the second surface and the plurality of nanowires being embedded between the second surface and the transparent dielectric coating.
METHOD AND APPARATUS OF FABRICATING AN INTERCONNECTOR ASSEMBLY
The invention to a method of making an interconnector assembly for electrically interconnecting solar cells, wherein the method comprises: feeding a plurality of (preferably elongated) electrical conductors that form an conductor array defining interspaces that are free from conductors; and applying at least one sheet, preferably made of electrically insulating material, to a side of the conductor array, wherein the sheet has at least one contact zone coming into contact with the conductors and intermediate portions overlapping with the interspaces of the conductor array. The invention also refers to an apparatus for fabricating an interconnector assembly for electrically interconnecting solar cells and to a rotatable heating drum.
METHOD FOR THE PRODUCTION OF AN OPTOELECTRONIC MODULE INCLUDING A SUPPORT COMPRISING A METAL SUBSTRATE, A DIELECTRIC COATING AND A CONDUCTIVE LAYER
The invention is directed to a method for the production of an optoelectronic module including a support (5) and an additional layer, said support being formed by an assembly (25) which has no optoelectronic properties and which comprises, successively, a metal substrate (27), a dielectric coating (29) disposed on the metal substrate, and an electrically conductive layer (31) disposed on the dielectric coating. The production method comprises: a step of providing the support and performing a method in which the support is checked, or providing the support after it has already been checked; and a step of depositing at least one additional layer on the electrically conductive layer. The method in which support is checked comprises the following steps: electrical excitation of the support by bringing the metal substrate and the electrically conductive layer into electrical contact with a voltage source (33); and photothermal examination of the excited support so as to detect any possible fault (49, 51) located at least partially in the dielectric coating (29) and to provide a photothermal examination result.
WAFER ALIGNMENT WITH RESTRICTED VISUAL ACCESS
Wafer alignment with restricted visual access has been disclosed. In an example, a method of processing a substrate for fabricating a solar cell involves supporting the substrate over a stage. The method involves forming a substantially opaque layer over the substrate. The substantially opaque layer at least partially covers edges of the substrate. The method involves performing fit-up of the substantially opaque layer to the substrate. The method involves illuminating the covered edges of the substrate with light transmitted through the stage, and capturing a first image of the covered edges of the substrate based on the light transmitted through the stage. The method further includes determining a first position of the substrate relative to the stage based on the first image of the covered edges. The substrate may be further processed based on the determined first position of the substrate under the substantially opaque layer.
WAFER ALIGNMENT WITH RESTRICTED VISUAL ACCESS
Wafer alignment with restricted visual access has been disclosed. In an example, a method of processing a substrate for fabricating a solar cell involves supporting the substrate over a stage. The method involves forming a substantially opaque layer over the substrate. The substantially opaque layer at least partially covers edges of the substrate. The method involves performing fit-up of the substantially opaque layer to the substrate. The method involves illuminating the covered edges of the substrate with light transmitted through the stage, and capturing a first image of the covered edges of the substrate based on the light transmitted through the stage. The method further includes determining a first position of the substrate relative to the stage based on the first image of the covered edges. The substrate may be further processed based on the determined first position of the substrate under the substantially opaque layer.
APPARATUS AND METHODS FOR MICRO-TRANSFER-PRINTING
In an aspect, a system and method for assembling a semiconductor device on a receiving surface of a destination substrate is disclosed. In another aspect, a system and method for assembling a semiconductor device on a destination substrate with topographic features is disclosed. In another aspect, a gravity-assisted separation system and method for printing semiconductor device is disclosed. In another aspect, various features of a transfer device for printing semiconductor devices are disclosed.
Mapping Of Measurement Data To Production Tool Location And Batch Or Time Of Processing
The present invention provides methods and systems for manufacturing process control of photovoltaic products. Some embodiments relate to a method for tracking wafers for photovoltaic products with respect to which production tool processed them and their position within that production tool. Some embodiments relate to measuring and characterizing the critical-to-quality parameters of the partially-finished photovoltaic products emerging from the production tool in question. Some embodiments relate to display and visualization of the measured parameters on a computer screen, such that the parameters of each production unit can be directly observed in the context of which production tools processed them, which location within a specific production tool they were located in during processing, and which batch, or in the case of continuous processing, what time, the unit(s) was/where processed.