An LED packaging device includes a frame including a bottom wall having a bottom surface and a surrounding wall extending upwardly from the bottom wall, at least one LED chip, a plurality of spaced-apart reflectors and a packaging body. The bottom and surrounding walls cooperatively define a mounting space. The surrounding wall has an internal side surface facing the mounting space and a top surface facing away from the bottom surface. The LED chip is disposed on the bottom surface and is received in the mounting space. Each of the reflectors is disposed on a peripheral region of the bottom surface. The packaging body covers the LED chip and the reflectors, such that the LED chip is sealed inside the mounting space.

A method for forming a common electrode is provided, including: a) providing a support substrate on which rest optoelectronic devices separated by trenches; b) forming a dielectric layer on front faces, flanks, and a bottom of the trenches, of a thickness E1 and a thickness E2, which is less than the thickness E1, at, respectively, the front faces and the flanks; c) etching a thickness E3 of the dielectric layer, so as to uncover the flanks at a first section of the trenches; d) forming a metal layer filling the trenches and covering the front faces; and e) performing a mechanochemical polishing of the metal layer, the polishing stopping on a portion of the dielectric layer, the metal layer remaining in the trenches forming the common electrode.

A display apparatus including: a plurality of display modules, each including a substrate and inorganic light emitting diodes mounted on a mounting surface of the substrate; a cover layer configured to cover the mounting surface of each of the display modules; and an adhesive layer arranged between the cover layer and the mounting surface of each of the display modules to cause the cover layer to adhere to the mounting surface of each of the display modules, wherein the adhesive layer includes a first region, disposed on a gap formed between the plurality of display modules, and a second region disposed on the mounting surface of each of the display modules, and wherein the adhesive layer includes a photosensitive material such that the first region of the adhesive layer is configured to undergo a photosensitive reaction based on an external light source.

Herein disclosed are a wafer, a wafer testing system, and a method thereof. Said wafer testing method comprises the following steps. First, an incident light is provided toward a wafer. And, a wafer surface image corresponded to the wafer is generated. Then, determining whether the wafer surface image has a plurality of first strips and a plurality of second strips, and the plurality of first strips and the plurality of second strips are symmetrical. When the wafer surface image has the plurality of first strips and the plurality of second strips, and the plurality of first strips and the plurality of second strips are symmetrical, a qualified signal corresponded to the wafer is provided.

An optoelectronic device and a manufacturing method thereof are provided. The optoelectronic device includes a substrate, light emitting chips disposed on the substrate and electrically connected to the substrate, a first annular structure disposed on the substrate and around the light emitting chips, a first wavelength conversion layer disposed in the first annular structure and covering the light emitting chips, a second annular structure disposed on the substrate and around the light emitting chips and further being in contact with the first annular structure, and a second wavelength conversion layer disposed in the second annular structure and covering the first wavelength conversion layer and the light emitting chips. Wavelength conversion substances contained in the first wavelength conversion layer and the second wavelength conversion layer respectively are different in material. Therefore, the optoelectronic device can achieve improved uniformity of luminescence as well as light output quality.

Described are light emitting diode (LED) devices comprising a plurality of mesas defining pixels, each of the mesas comprising semiconductor layers, an N-contact material in a space between each of the plurality of mesas, a dielectric material which insulates sidewalls of the P-type layer and the active region from the metal. A hard mask layer is above the semiconductor layers, the hard mask layer having a plurality of openings therein, each partially filled with a liner layer and partially filled with a P-metal material plug, the P-metal material plug having a width; and a passivation film is on the hard mask layer, the passivation film having a plurality of passivation film openings therein defining a width, the width of each passivation film opening being less than the width of a combination of the P-metal material plug and the liner layer.

An optoelectronic component (10) is specified, comprising a semiconductor body (6) with an active region (4) suitable for emission of radiation and comprising a quantum well structure, wherein the quantum well structure comprises at least one quantum well layer (41) and barrier layers (42), a first electrical contact (1) and a second electrical contact (2), wherein the active region (4) comprises at least one intermixed region (44) and at least one non-intermixed region (43).

The at least one quantum well layer (41) and the barrier layers (42) are at least partially intermixed in the intermixed region (44), such that the intermixed region (44) comprises a larger electronic bandgap than the at least one quantum well layer (41) in the non-intermixed region (43). The first electrical contact (1) is a metal contact arranged on a radiation exit surface of the semiconductor body (6), wherein the intermixed region (44) is arranged below the first contact (1) in the vertical direction. Further, a method for producing the optoelectronic component (10) is specified.

In an embodiment an optoelectronic device includes an epitaxial layer stack having at least a first epitaxial layer and a second epitaxial layer arranged above the first epitaxial layer, wherein the following layers are embedded in the epitaxial layer stack a first semiconductor layer of a first conductivity type, an active layer arranged above the first semiconductor layer and configured to generate light, and a second semiconductor layer of a second conductivity type arranged above the active layer, wherein an interface between the first epitaxial layer and the second epitaxial layer extends at least partially through the first semiconductor layer and/or the second semiconductor layer, and wherein the active layer is embedded in a non-doped barrier layer, the barrier layer covering one or more side surfaces of the active layer.

A light-emitting element contains negative ions and positive ions, and includes a solid ionic layer, a layer containing quantum dots, and a cathode electrode and an anode electrode. The ionic layer includes a p-type doped region on the anode electrode side containing the negative ions in a higher quantity than the positive ions, an n-type doped region on the cathode electrode side containing the positive ions in a higher quantity than the negative ions, and a junction region between the p-type doped region and the n-type doped region. The layer containing the quantum dots is adjacent to the junction region. Alternatively, the quantum dots are contained in the junction region. Alternatively, the quantum dots are adjacent to the junction region.

A light-emitting element includes a first semiconductor layer doped to have a first polarity; a second semiconductor layer doped to have a second polarity that is different from the first polarity; an active layer placed between the first semiconductor layer and the second semiconductor layer; and an insulating layer surrounding at least the outer surface of the active material. The insulating layer includes an insulating film surrounding the active layer, and an element dispersion agent including a magnetic metal and bonded to an outer surface of the insulating film.