H01L33/02

SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD OF THE SAME
20220005840 · 2022-01-06 ·

An object is to provide a semiconductor device with high aperture ratio or a manufacturing method thereof. Another object is to provide semiconductor device with low power consumption or a manufacturing method thereof. A light-transmitting conductive layer which functions as a gate electrode, a gate insulating film formed over the light-transmitting conductive layer, a semiconductor layer formed over the light-transmitting conductive layer which functions as the gate electrode with the gate insulating film interposed therebetween, and a light-transmitting conductive layer which is electrically connected to the semiconductor layer and functions as source and drain electrodes are included.

MICRO-LEDS WITH ULTRA-LOW LEAKAGE CURRENT

Micro-scale light emitting diodes (micro-LEDs) with ultra-low leakage current results from a sidewall passivation method for the micro-LEDs using a chemical treatment followed by conformal dielectric deposition, which reduces or eliminates sidewall damage and surface recombination, and the passivated micro-LEDs can achieve higher efficiency than micro-LEDs without sidewall treatments. Moreover, the sidewall profile of micro-LEDs can be altered by varying the conditions of chemical treatment.

GROUP III NITRIDE BASED LED STRUCTURES INCLUDING MULTIPLE QUANTUM WELLS WITH BARRIER-WELL UNIT INTERFACE LAYERS

Group III nitride based light emitting diode (LED) structures include multiple quantum wells with barrier-well units that include III nitride interface layers. Each interface layer may have a thickness of no greater than about 30% of an adjacent well layer, and a comparatively low concentration of indium or aluminum. One or more interface layers may be present in a barrier-well unit. Multiple barrier-well units having different properties may be provided in a single active region.

GROUP III NITRIDE BASED LED STRUCTURES INCLUDING MULTIPLE QUANTUM WELLS WITH BARRIER-WELL UNIT INTERFACE LAYERS

Group III nitride based light emitting diode (LED) structures include multiple quantum wells with barrier-well units that include III nitride interface layers. Each interface layer may have a thickness of no greater than about 30% of an adjacent well layer, and a comparatively low concentration of indium or aluminum. One or more interface layers may be present in a barrier-well unit. Multiple barrier-well units having different properties may be provided in a single active region.

LIGHT-EMITTING DEVICES, HEADLAMPS FOR VEHICLES, AND VEHICLES INCLUDING THE SAME

A light-emitting device includes an emission array including a plurality of light-emitting elements and a partition wall. The emission array includes a first region and a second region adjacent to each other. The partition wall is configured to isolate the first region and the second region from each other, such that the partition wall at least partially defines the first region in the emission array. The first region is associated with a first emission factor and the second region is associated with a second emission factor, the second emission factor different from the first emission factor.

Heterostructure for an optoelectronic device

A heterostructure, such as a group III nitride heterostructure, for use in an optoelectronic device is described. The heterostructure can include a sacrificial layer, which is located on a substrate structure. The sacrificial layer can be at least partially decomposed using a laser. The substrate structure can be completely removed from the heterostructure or remain attached thereto. One or more additional solutions for detaching the substrate structure from the heterostructure can be utilized. The heterostructure can undergo additional processing to form the optoelectronic device.

Heterostructure for an optoelectronic device

A heterostructure, such as a group III nitride heterostructure, for use in an optoelectronic device is described. The heterostructure can include a sacrificial layer, which is located on a substrate structure. The sacrificial layer can be at least partially decomposed using a laser. The substrate structure can be completely removed from the heterostructure or remain attached thereto. One or more additional solutions for detaching the substrate structure from the heterostructure can be utilized. The heterostructure can undergo additional processing to form the optoelectronic device.

Systems and method for integrated devices on an engineered substrate

A method of forming a plurality of devices on an engineered substrate structure includes forming an engineered substrate by providing a polycrystalline ceramic core, encapsulating the polycrystalline ceramic core with a first adhesion shell, encapsulating the first adhesion shell with a barrier layer, forming a bonding layer on the barrier layer, and forming a substantially single crystal layer coupled to the bonding layer. The method further comprises forming a buffer layer coupled to the substantially single crystal layer, forming one or more epitaxial III-V layers on the buffer layer according to requirements associated with the plurality of devices, and forming the plurality of devices on the substrate by removing a portion of the one or more epitaxial III-V layers disposed between the plurality of devices and removing a portion of the buffer layer disposed between the plurality of devices.

LIGHT-EMITTING DIODE AND SEMICONDUCTOR DEVICE

Provided are a light-emitting diode and a semiconductor device. The light-emitting diode comprises: a substrate; and a buffer layer, an N-type gallium nitride layer, a light-emitting region buffer layer, a first light-emitting layer, a second light-emitting layer, an electron blocking layer, and a P-type gallium nitride layer that are epitaxially grown on the substrate sequentially, wherein: the second light-emitting layer comprises one or more light-emitting well-barrier pair sub-layers; the thickness of the light-emitting region buffer layer is a preset first multiple of the thickness of the light-emitting well-barrier pair sub-layer; the thickness of the first light-emitting layer is a preset second multiple of the thickness of the light-emitting well-barrier pair sub-layer, the second multiple being less than the first multiple; and the thickness of the electron blocking layer is a preset third multiple of the thickness of the light-emitting well-barrier sub-layer, the third multiple being less than the first multiple.

PIXEL AND DISPLAY DEVICE INCLUDING THE SAME
20230282796 · 2023-09-07 ·

A pixel includes an emission area and a non-emission area, a first pixel electrode, a first intermediate electrode, a second intermediate electrode, and a second pixel electrode spaced from each other, first light emitting elements including a first end electrically connected to the first pixel electrode and a second end electrically connected to the first intermediate electrode, second light emitting elements including a first end electrically connected to the first intermediate electrode and a second end electrically connected to the second intermediate electrode, and third light emitting elements including a first end electrically connected to the second intermediate electrode and a second end electrically connected to the second pixel electrode. The second intermediate electrode includes a first portion opposing the first intermediate electrode, a second portion between the first pixel electrode and the second pixel electrode, and a diagonal line portion between the first portion and the second portion.