Discussed is a display device having a plurality of semiconductor light emitting elements mounted on a substrate, wherein at least one of the semiconductor light emitting elements includes a first electrode and a second electrode spaced apart each other, a first conductivity type semiconductor layer disposed with the first electrode, a second conductivity type semiconductor layer configured to overlap with the first conductivity type semiconductor layer, and disposed with the second electrode, a first passivation layer covering outer surfaces of the first conductivity type semiconductor layer and the second conductivity type semiconductor layer, and a second passivation layer covering the first passivation layer, wherein at least one portion of the second electrode is overlapped with at least one portion of the first electrode along the thickness direction of the semiconductor light emitting element.

A display device and a method of manufacturing the same are provided. The display device includes a first alignment electrode and a second alignment electrode spaced apart from each other, a light emitting element between the first alignment electrode and the second alignment electrode, a first auxiliary electrode at a first side of the light emitting element in a plan view, and separated from the first alignment electrode, and a second auxiliary electrode at a second side of the light emitting element in a plan view, and separated from the second alignment electrode, wherein an alignment signal is configured to be applied to the first alignment electrode, and wherein a first auxiliary signal of a phase that is different from a phase of the alignment signal is configured to be applied to the first auxiliary electrode.

A display device and a method of manufacturing the same are provided. The display device includes a first alignment electrode and a second alignment electrode spaced apart from each other, a light emitting element between the first alignment electrode and the second alignment electrode, a first auxiliary electrode at a first side of the light emitting element in a plan view, and separated from the first alignment electrode, and a second auxiliary electrode at a second side of the light emitting element in a plan view, and separated from the second alignment electrode, wherein an alignment signal is configured to be applied to the first alignment electrode, and wherein a first auxiliary signal of a phase that is different from a phase of the alignment signal is configured to be applied to the first auxiliary electrode.

The present disclosure provides a light-emitting device comprising a substrate with a topmost surface; a first semiconductor stack arranged on the substrate, and comprising a first top surface separated from the topmost surface by a first distance; a first bonding layer arranged between the substrate and the first semiconductor stack; a second semiconductor stack arranged on the substrate, and comprising a second top surface separated from the topmost surface by a second distance which is different form the first distance; a second bonding layer arranged between the substrate and the second semiconductor stack; a third semiconductor stack arranged on the substrate, and comprising third top surface separated from the topmost surface by a third distance; and a third bonding layer arranged between the substrate and the third semiconductor stack; wherein the first semiconductor stack, the second semiconductor stack, and the third semiconductor stack are configured to emit different color lights.

Described are light emitting diode (LED) devices comprising a mesa with semiconductor layers, the semiconductor layers including an N-type layer, an active layer, and a P-type layer. The mesa has a top surface and at least one side wall, the at least one side wall defining a trench having a bottom surface. A passivation layer is on the at least one side wall and on the top surface of the mesa, the passivation layer comprises one or more a low-refractive index material and distributed Bragg reflector (DBR). A p-type contact is on the top surface of the mesa, and an n-type contact on the bottom surface of the trench.

A semiconductor device is provided, which includes a first semiconductor structure, a second semiconductor structure and a light-emitting structure. The first semiconductor structure includes a first confinement layer and a first cladding layer adjacent to the first confinement layer. The second semiconductor structure is located on the first semiconductor structure and includes a second confinement layer. The light-emitting structure is located between the first semiconductor structure and the second semiconductor structure. The light-emitting structure includes a first multiple quantum well structure containing a plurality of semiconductor stacks. Each of the semiconductor stacks is stacked by a well layer and a barrier layer. The first confinement layer and the second confinement layer are adjacent to the light emitting structure. The well layer and the barrier layer in each of the semiconductor stacks include the same quaternary semiconductor material including InGaAsP, AlGaInAs or InGaNAs.

A semiconductor device is provided, which includes a first semiconductor structure, a second semiconductor structure and a light-emitting structure. The first semiconductor structure includes a first confinement layer and a first cladding layer adjacent to the first confinement layer. The second semiconductor structure is located on the first semiconductor structure and includes a second confinement layer. The light-emitting structure is located between the first semiconductor structure and the second semiconductor structure. The light-emitting structure includes a first multiple quantum well structure containing a plurality of semiconductor stacks. Each of the semiconductor stacks is stacked by a well layer and a barrier layer. The first confinement layer and the second confinement layer are adjacent to the light emitting structure. The well layer and the barrier layer in each of the semiconductor stacks include the same quaternary semiconductor material including InGaAsP, AlGaInAs or InGaNAs.

A display device includes a substrate having an emission area and a non-emission area, a first electrode and a second electrode spaced from each other on the substrate in the emission area, a first insulating layer on the substrate in the emission area and the non-emission area and covering at least a portion of the first electrode and the second electrode, a light-emitting element between the first electrode and the second electrode, a first contact electrode on the first electrode and in contact with one end portion of the light-emitting element, and a second contact electrode on the second electrode and in contact with the other end portion of the light-emitting element, a first active material layer on the first insulating layer in the non-emission area and electrically connected to the first contact electrode, and a gate insulating layer on the first active material layer.

A narrower LED package structure with sideways output of light suitable for a light guide plate includes two first electrodes, a package body, a cover layer, and two second electrodes. The LED chip is mounted on the first electrodes. The package body encapsulates the first electrodes, and surrounds the LED chip to define a light emitting region. The cover layer infills the light emitting region and covers the LED chip. The second electrodes are positioned outside the package body. Along a plane parallel to the first electrodes, a surface area of the two second electrodes is greater than a surface area of the portion of the two first electrodes positioned in the light emitting region.

A narrower LED package structure with sideways output of light suitable for a light guide plate includes two first electrodes, a package body, a cover layer, and two second electrodes. The LED chip is mounted on the first electrodes. The package body encapsulates the first electrodes, and surrounds the LED chip to define a light emitting region. The cover layer infills the light emitting region and covers the LED chip. The second electrodes are positioned outside the package body. Along a plane parallel to the first electrodes, a surface area of the two second electrodes is greater than a surface area of the portion of the two first electrodes positioned in the light emitting region.