Patent classifications
H01L33/36
Bonding electrode structure of flip-chip led chip and fabrication method
A bonding electrode structure of a flip-chip LED chip includes: a substrate; a light-emitting epitaxial layer over the substrate; a bonding electrode over the light-emitting epitaxial layer, wherein the bonding electrode structure includes a metal laminated layer having a bottom layer and an upper surface layer from bottom up. The bottom layer structure is oxidable metal and the side wall forms an oxide layer. The upper surface layer is non-oxidable metal. The bonding electrode structure has a main contact portion, and a grid-shape portion surrounding the main contact portion in a horizontal direction. The problems during packaging and soldering of the flip-chip LED chip structure, such as short circuit or electric leakage, can thus be solved.
MICRO LIGHT EMITTING DIODE (LED) STRUCTURE, METHOD FOR MANUFACTURING THE SAME AND DISPLAY INCLUDING THE SAME
Provided is a micro light emitting diode (LED) structure including an n-type semiconductor substrate layer, a light emitting structure layer formed on the n-type semiconductor substrate layer, and a p-type semiconductor layer formed on the light emitting structure layer, wherein the light emitting structure layer includes an arrangement of light emitting structures in which active layers including In and Ga are formed on tops thereof, wherein the light emitting structure layer forms at least three distinctive regions each including a single light emitting structure or a plurality of light emitting structures, the distinctive regions configured to emit light of at least two different wavelengths, the distinctive regions are is controllable to emit light individually, and the distinctive regions are different in at least one of sizes of base faces, heights, and center-to-center distances of the lighting emitting structures of the regions.
MICRO LIGHT EMITTING DIODE (LED) STRUCTURE, METHOD FOR MANUFACTURING THE SAME AND DISPLAY INCLUDING THE SAME
Provided is a micro light emitting diode (LED) structure including an n-type semiconductor substrate layer, a light emitting structure layer formed on the n-type semiconductor substrate layer, and a p-type semiconductor layer formed on the light emitting structure layer, wherein the light emitting structure layer includes an arrangement of light emitting structures in which active layers including In and Ga are formed on tops thereof, wherein the light emitting structure layer forms at least three distinctive regions each including a single light emitting structure or a plurality of light emitting structures, the distinctive regions configured to emit light of at least two different wavelengths, the distinctive regions are is controllable to emit light individually, and the distinctive regions are different in at least one of sizes of base faces, heights, and center-to-center distances of the lighting emitting structures of the regions.
Semiconductor Heterostructure with Improved Light Emission
A semiconductor heterostructure for an optoelectronic device with improved light emission is disclosed. The heterostructure can include a first semiconductor layer having a first index of refraction n1. A second semiconductor layer can be located over the first semiconductor layer. The second semiconductor layer can include a laminate of semiconductor sublayers having an effective index of refraction n2. A third semiconductor layer having a third index of refraction n3 can be located over the second semiconductor layer. The first index of refraction n1 is greater than the second index of refraction n2, which is greater than the third index of refraction n3.
Semiconductor Heterostructure with Improved Light Emission
A semiconductor heterostructure for an optoelectronic device with improved light emission is disclosed. The heterostructure can include a first semiconductor layer having a first index of refraction n1. A second semiconductor layer can be located over the first semiconductor layer. The second semiconductor layer can include a laminate of semiconductor sublayers having an effective index of refraction n2. A third semiconductor layer having a third index of refraction n3 can be located over the second semiconductor layer. The first index of refraction n1 is greater than the second index of refraction n2, which is greater than the third index of refraction n3.
LIGHT-EMITTING DEVICE, INFRARED LIGHT SOURCE, AND METHOD FOR MANUFACTURING LIGHT-EMITTING DEVICE
A light-emitting device according to one embodiment includes: a substrate; a graphite thin film disposed on the substrate; and an electrode provided on a second surface of the graphite thin film on an edge portion of the graphite thin film, the second surface of the graphite thin film being opposite from a first surface of the graphite thin film, the first surface of the graphite thin film opposed to the substrate. A plurality of protrusions for supporting the graphite thin film is formed on a surface of the substrate opposed to the graphite thin film, at least over an entire region where the substrate and a portion of the graphite thin film other than the edge portion overlap each other when viewed along a thickness direction of the substrate.
LIGHT-EMITTING DEVICE, INFRARED LIGHT SOURCE, AND METHOD FOR MANUFACTURING LIGHT-EMITTING DEVICE
A light-emitting device according to one embodiment includes: a substrate; a graphite thin film disposed on the substrate; and an electrode provided on a second surface of the graphite thin film on an edge portion of the graphite thin film, the second surface of the graphite thin film being opposite from a first surface of the graphite thin film, the first surface of the graphite thin film opposed to the substrate. A plurality of protrusions for supporting the graphite thin film is formed on a surface of the substrate opposed to the graphite thin film, at least over an entire region where the substrate and a portion of the graphite thin film other than the edge portion overlap each other when viewed along a thickness direction of the substrate.
Transistors having on-chip integrated photon source or photonic-ohmic drain to facilitate de-trapping electrons trapped in deep traps of transistors
Techniques are provided that pumping of deep traps in GaN electronic devices using photons from an on-chip photon source. In various embodiments, a method for optical pumping of deep traps in GaN HEMTs is provided using an on-chip integrated photon source that is configured to generate photons during operation of the HEMT. In an aspect, the on-chip photon source is a SoH-LED. In various additional embodiments, an integration scheme is provided that integrates the photon source into the drain electrode of a HEMT, thereby converting the conventional HEMT with an ohmic drain to a transistor with hybrid photonic-ohmic drain (POD), a POD transistor or PODFET for short.
Transistors having on-chip integrated photon source or photonic-ohmic drain to facilitate de-trapping electrons trapped in deep traps of transistors
Techniques are provided that pumping of deep traps in GaN electronic devices using photons from an on-chip photon source. In various embodiments, a method for optical pumping of deep traps in GaN HEMTs is provided using an on-chip integrated photon source that is configured to generate photons during operation of the HEMT. In an aspect, the on-chip photon source is a SoH-LED. In various additional embodiments, an integration scheme is provided that integrates the photon source into the drain electrode of a HEMT, thereby converting the conventional HEMT with an ohmic drain to a transistor with hybrid photonic-ohmic drain (POD), a POD transistor or PODFET for short.
Light-emitting device and light-emitting device package having same
Disclosed in an embodiment is a light emitting device comprising: a light-emitting structure having a first semiconductor layer, an active layer under the first semiconductor layer, and a second semiconductor layer under the active layer; a first contact layer disposed under the light-emitting structure; a reflective layer disposed under the first contact layer; a first electrode layer including a capping layer disposed under the reflective layer; a second electrode layer electrically connected with the first semiconductor layer; a protective layer disposed at the outer peripheral portion between the capping layer and the light-emitting structure; a barrier layer at an outer side of the reflective layer and made of a metal different from that of the reflective layer; and a support member disposed under the capping layer.