Patent classifications
H01L33/44
Chip-scale package light emitting diode
A chip-scale package type light emitting diode includes a first conductivity type semiconductor layer, a mesa, a second conductivity type semiconductor layer, a transparent conductive oxide layer, a dielectric layer, a lower insulation layer, a first pad metal layer, and a second pad metal layer, an upper insulation layer. The upper insulation layer covers the first pad metal layer and the second pad metal layer, and includes a first opening exposing the first pad metal layer and a second opening exposing the second pad metal layer. The openings of the dielectric layer include openings that have different sizes from one another.
Chip-scale package light emitting diode
A chip-scale package type light emitting diode includes a first conductivity type semiconductor layer, a mesa, a second conductivity type semiconductor layer, a transparent conductive oxide layer, a dielectric layer, a lower insulation layer, a first pad metal layer, and a second pad metal layer, an upper insulation layer. The upper insulation layer covers the first pad metal layer and the second pad metal layer, and includes a first opening exposing the first pad metal layer and a second opening exposing the second pad metal layer. The openings of the dielectric layer include openings that have different sizes from one another.
FLIP LED CHIP AND MANUFACTURING METHOD THEREFOR
Disclosed is a flip-chip LED, comprising: an epitaxial layer on a surface of a substrate, and comprising a first semiconductor layer, a light emitting layer and a second semiconductor layer arranged in sequence from bottom to top, wherein a mesa in the epitaxial layer has an upper surface provided by the second semiconductor layer, a lower surface provided by the first semiconductor layer, and a side surface connecting the upper surface and the lower surface; a first insulating layer covering the side surface of the mesa, part of the upper surface and part of the lower surface; and a reflective layer on the second semiconductor layer. A manufacturing method of a flip-chip LED is also provided, an insulating layer covers the side surface of the mesa to protect the mesa immediately after the mesa is formed, to avoid abnormal phenomena and improve yield of the flip-chip LED.
COLOUR DISPLAY DEVICE COMPRISING A MOSAIC OF TILES OF LIGHT-EMITTING MICRO-DIODES
A color display device includes a matrix of light sources, each light source comprising a single micro-light-emitting diode, the light sources being of three different colors, each color pixel of the matrix comprising three sources emitting in the three different colors. In the device, the matrix is formed by a group of elementary components of identical shape, each elementary component comprising at least two light-emitting diodes emitting in one of the three spectral bands—the shape of the light-emitting diodes being either a triangle, or a quadrilateral, or a pentagon—the elementary components being assembled in threes such that their respective diodes touch one another by one of their sides, the group formed by the three sources associated with the three diodes forming a color pixel.
COLOUR DISPLAY DEVICE COMPRISING A MOSAIC OF TILES OF LIGHT-EMITTING MICRO-DIODES
A color display device includes a matrix of light sources, each light source comprising a single micro-light-emitting diode, the light sources being of three different colors, each color pixel of the matrix comprising three sources emitting in the three different colors. In the device, the matrix is formed by a group of elementary components of identical shape, each elementary component comprising at least two light-emitting diodes emitting in one of the three spectral bands—the shape of the light-emitting diodes being either a triangle, or a quadrilateral, or a pentagon—the elementary components being assembled in threes such that their respective diodes touch one another by one of their sides, the group formed by the three sources associated with the three diodes forming a color pixel.
SEMICONDUCTOR DEVICE
A semiconductor device includes a semiconductor stack, a third semiconductor structure, a dielectric layer, and a reflective layer under the third semiconductor structure. The semiconductor stack includes a first semiconductor structure, an active structure, a second semiconductor structure. The first semiconductor structure has a first surface which includes a first portion and a second portion, and the first surface has a first area. The third semiconductor structure connects to the first portion, and has a second surface with a second area. The dielectric layer connects to the second portion and includes a plurality of openings, and the plurality of openings have a third area. A ratio of the second area to the first area is between 0.1˜0.7, and a ratio of the third area to the first area is less than 0.2.
SEMICONDUCTOR DEVICE
A semiconductor device includes a semiconductor stack, a third semiconductor structure, a dielectric layer, and a reflective layer under the third semiconductor structure. The semiconductor stack includes a first semiconductor structure, an active structure, a second semiconductor structure. The first semiconductor structure has a first surface which includes a first portion and a second portion, and the first surface has a first area. The third semiconductor structure connects to the first portion, and has a second surface with a second area. The dielectric layer connects to the second portion and includes a plurality of openings, and the plurality of openings have a third area. A ratio of the second area to the first area is between 0.1˜0.7, and a ratio of the third area to the first area is less than 0.2.
SEMICONDUCTOR PACKAGE STRUCTURE AND METHOD FOR MANUFACTURING THE SAME
The present disclosure provides an electronic package. The electronic package includes a substrate, a first electronic component, an encapsulant, and a shielding layer. The substrate has a first upper surface, a second upper surface, and a first lateral surface extending between the first upper surface and the second upper surface. The first electronic component is disposed on the substrate. The encapsulant coves the first electronic component and the first lateral surface of the substrate. The shielding layer covers the encapsulant. The shielding layer is spaced apart from the first lateral surface of the substrate.
Hybrid IGZO pixel architecture
A display device includes a silicon wafer including digital circuits, a micro-light emitting diode (micro-LED) wafer including an array of micro-LEDs, and an indium-gallium-zinc-oxide (IGZO) layer between the silicon wafer and the micro-LED wafer and including analog circuits. The digital circuits are characterized by a first operating supply voltage and are configured to generate digital control signals based on digital display data of an image frame. The analog circuits are characterized by a second operating supply voltage higher than the first operating supply voltage. The analog circuits includes analog storage devices configured to storing analog signals, and transistors controlled by the digital control signals and the analog signals to generate drive currents for driving the array of micro-LEDs. The digital circuits on the silicon wafer or the analog circuits in the IGZO layer include level-shifting circuits at interfaces between the digital circuits and the analog circuits.
Light-emitting structure having a plurality of light-emitting structure units
A light-emitting device, includes a substrate with a top surface; a first light-emitting structure unit and a second light-emitting structure unit separately formed on the top surface and adjacent to each other, and wherein the first light-emitting structure unit includes a first sidewall and a second sidewall; a trench between the first and the second light-emitting structure units; and an electrical connection arranged on the first sidewall and the second light-emitting structure unit, and electrically connecting the first light-emitting structure unit and the second light-emitting structure unit; wherein the first sidewall connects to the top surface; wherein the first sidewall faces the second light-emitting structure units, and the second sidewall is not between the first light-emitting structure unit and the second light-emitting structure unit; and wherein the second sidewall is steeper than the first sidewall.