H01L2924/053

Semiconductor Device Including Bonding Pad Metal Layer Structure

A semiconductor device is proposed. The semiconductor device includes a wiring metal layer structure. The semiconductor device further includes a dielectric layer structure arranged directly on the wiring metal layer structure. The semiconductor device further includes a bonding pad metal layer structure arranged, at least partly, directly on the dielectric layer structure. A layer thickness of the dielectric layer structure ranges from 1% to 30% of a layer thickness of the wiring metal layer structure. The wiring metal layer structure and the bonding pad metal structure are electrically connected through openings in the dielectric layer structure.

Semiconductor Device Including Bonding Pad Metal Layer Structure

A semiconductor device is proposed. The semiconductor device includes a wiring metal layer structure. The semiconductor device further includes a dielectric layer structure arranged directly on the wiring metal layer structure. The semiconductor device further includes a bonding pad metal layer structure arranged, at least partly, directly on the dielectric layer structure. A layer thickness of the dielectric layer structure ranges from 1% to 30% of a layer thickness of the wiring metal layer structure. The wiring metal layer structure and the bonding pad metal structure are electrically connected through openings in the dielectric layer structure.

Bonded structures

A bonded structure can include a first element having a first conductive interface feature and a second element having a second conductive interface feature. An integrated device can be coupled to or formed with the first element or the second element. The first conductive interface feature can be directly bonded to the second conductive interface feature to define an interface structure. The interface structure can be disposed about the integrated device in an at least partially annular profile to connect the first and second elements.

Bonded structures

A bonded structure can include a first element having a first conductive interface feature and a second element having a second conductive interface feature. An integrated device can be coupled to or formed with the first element or the second element. The first conductive interface feature can be directly bonded to the second conductive interface feature to define an interface structure. The interface structure can be disposed about the integrated device in an at least partially annular profile to connect the first and second elements.

Semiconductor-on-insulator with back side strain inducing material

Embodiments of the present invention provide for the application of strain inducing layers to enhance the mobility of transistors formed on semiconductor-on-insulator (SOI) structures. In one embodiment, a method for fabricating an integrated circuit is disclosed. In a first step, active circuitry is formed in an active layer of a SOI wafer. In a second step, substrate material is removed from a substrate layer disposed on a back side of the SOI wafer. In a third step, insulator material is removed from the back side of the SOI wafer to form an excavated insulator region. In a fourth step, a strain inducing material is deposited on the excavated insulator region. The strain inducing material interacts with the pattern of excavated insulator such that a single layer provides both tensile and compressive stress to p-channel and n-channel transistors, respectively. In alternative embodiments, the entire substrate is removed before forming the strain inducing material.

Semiconductor-on-insulator with back side strain inducing material

Embodiments of the present invention provide for the application of strain inducing layers to enhance the mobility of transistors formed on semiconductor-on-insulator (SOI) structures. In one embodiment, a method for fabricating an integrated circuit is disclosed. In a first step, active circuitry is formed in an active layer of a SOI wafer. In a second step, substrate material is removed from a substrate layer disposed on a back side of the SOI wafer. In a third step, insulator material is removed from the back side of the SOI wafer to form an excavated insulator region. In a fourth step, a strain inducing material is deposited on the excavated insulator region. The strain inducing material interacts with the pattern of excavated insulator such that a single layer provides both tensile and compressive stress to p-channel and n-channel transistors, respectively. In alternative embodiments, the entire substrate is removed before forming the strain inducing material.

METHOD FOR CONNECTING COMPONENTS BY PRESSURE SINTERING
20170239728 · 2017-08-24 ·

A method for connecting components involves providing an arrangement of at least two components each containing at least one metallic contact surface and a metallic sintering agent in the form of a metallic solid body having metal oxide surfaces arranged between the components and pressuring sintering the arrangement whereby metal oxide surfaces of the metallic sintering agent and the metallic contact surfaces of the components each form a joint contact surface. The pressure sintering is carried out in an atmosphere containing at least one oxidizable compound and/or the metal oxide surfaces are provided with at least one oxidizable organic compound before formation of the corresponding joint contact surface.

METHOD FOR CONNECTING COMPONENTS BY PRESSURE SINTERING
20170239728 · 2017-08-24 ·

A method for connecting components involves providing an arrangement of at least two components each containing at least one metallic contact surface and a metallic sintering agent in the form of a metallic solid body having metal oxide surfaces arranged between the components and pressuring sintering the arrangement whereby metal oxide surfaces of the metallic sintering agent and the metallic contact surfaces of the components each form a joint contact surface. The pressure sintering is carried out in an atmosphere containing at least one oxidizable compound and/or the metal oxide surfaces are provided with at least one oxidizable organic compound before formation of the corresponding joint contact surface.

Display device incorporating self-assembled monolayer and method of manufacturing the same

A display device and a method of manufacturing the same are provided. The display device includes a first electrode disposed on a substrate, an adhesive auxiliary layer disposed on the first electrode and including a self-assembled monolayer, a light emitting element disposed on the adhesive auxiliary layer, and a contact electrode disposed between the adhesive auxiliary layer and the light emitting element. The light emitting element includes a first semiconductor layer, a second semiconductor layer disposed on the first semiconductor layer, and an intermediate layer disposed between the first semiconductor layer and the second semiconductor layer.

Display device incorporating self-assembled monolayer and method of manufacturing the same

A display device and a method of manufacturing the same are provided. The display device includes a first electrode disposed on a substrate, an adhesive auxiliary layer disposed on the first electrode and including a self-assembled monolayer, a light emitting element disposed on the adhesive auxiliary layer, and a contact electrode disposed between the adhesive auxiliary layer and the light emitting element. The light emitting element includes a first semiconductor layer, a second semiconductor layer disposed on the first semiconductor layer, and an intermediate layer disposed between the first semiconductor layer and the second semiconductor layer.