Patent classifications
H01L2924/15
Surface mountable microphone package, a microphone arrangement, a mobile phone and a method for recording microphone signals
A surface mountable microphone package comprises a first microphone and a second microphone. Furthermore, the surface mountable microphone package comprises a first opening for the first microphone and a second opening for the second microphone. The first opening and the second opening are arranged on opposite sides of the surface mountable microphone package.
ELECTRONIC DEVICE AND MANUFACTURING METHOD THEREOF
An electronic device and a manufacturing method thereof are provided. The manufacturing method of the electronic device includes forming a circuit substrate. Forming the circuit substrate includes providing a base material, wherein the base material has a first side and a second side opposite to each other. A contact pad is formed on the first side. An electronic element is provided. A conductive bump is formed on the contact pad, wherein the electronic element is bonded onto the circuit substrate via the conductive bump. A laser is applied to an area of the second side of the base material corresponding to the contact pad.
Photo-Sensitive Silicon Package Embedding Self-Powered Electronic System
A self-powered electronic system comprises a first chip (401) of single-crystalline semiconductor embedded in a second chip (302) of single-crystalline semiconductor shaped as a container bordered by ridges. The assembled chips are nested and form an electronic device assembled, in turn, in a slab of weakly p-doped low-grade silicon shaped as a container (330) bordered by ridges (331). The flat side (335) of the slab includes a heavily n-doped region (314) forming a pn-junction (315) with the p-type bulk. A metal-filled deep silicon via (350) through the p-type ridge (331) connects the n-region with the terminal (322) on the ridge surface as cathode of the photovoltaic cell with the p-region as anode. The voltage across the pn-junction serves as power source of the device.
Package structure, electronic device and method for manufacturing package structure
A package structure, an electronic device and a method for manufacturing the package structure are presented. The package structure comprises: a substrate (100), a sensing module (200) disposed on an upper surface of the substrate (100) and electrically connected to the substrate (100), and a package colloid (300) disposed on the upper surface of the substrate (100) and coating at least one portion of the sensing module (200), wherein the sensing module (200) comprises a capacitive sensor (210) and an optical sensor (220), and the package colloid (300) comprises at least one portion of a photic zone (310) disposed corresponding to the optical sensor (220). Thus, the capacitive sensor and the optical sensor can be packaged in one package structure, so as to improve the degree of integration of the package structure and save the package space.
Method of forming conductive bumps for cooling device connection
A method of preparing a semiconductor substrate with metal bumps on both sides of the substrate includes depositing a first-side UBM layer on a first surface of the substrate, and forming a plurality of first-side metal bumps on the first surface of the substrate after the first-side UBM layer is deposited. The method includes forming a second-side UBM layer on a second side of the substrate, and the first surface and the second surface are opposite of each other. The method includes forming a plurality of second-side metal bumps on the second surface of the substrate after the second-side UBM layer is deposited. The method includes removing exposed first-side UBM layer and exposed second-side UBM layer after the plurality of first-side metal bumps and the plurality of second-side metal bumps are formed. The method includes reflowing the plurality of first-side metal bumps and the plurality of second side metal bumps.
PACKING STRUCTURE AND METHOD FOR FORMING THE SAME
A method for forming a packaging structure is provided. The method includes providing a first substrate and a second substrate. The first substrate includes a first base material and a first dielectric layer on the first base material, and the second substrate includes a second base material and a second dielectric layer on the second base material. The second base material has a first through hole. The first dielectric layer and the second dielectric layer have a first hole and a second hole, respectively. The method further includes connecting the second substrate to the first substrate in such a way that the second dielectric layer is connected to the first dielectric layer to form a first composite structure; thinning the top surface of the first composite structure to expose the first through hole; and forming a first conductive member in the first through hole.
Photo-sensitive silicon package embedding self-powered electronic system
A self-powered electronic system comprises a first chip (401) of single-crystalline semiconductor embedded in a second chip (302) of single-crystalline semiconductor shaped as a container bordered by ridges. The assembled chips are nested and form an electronic device assembled, in turn, in a slab of weakly p-doped low-grade silicon shaped as a container (330) bordered by ridges (331). The flat side (335) of the slab includes a heavily n-doped region (314) forming a pn-junction (315) with the p-type bulk. A metal-filled deep silicon via (350) through the p-type ridge (331) connects the n-region with the terminal (322) on the ridge surface as cathode of the photovoltaic cell with the p-region as anode. The voltage across the pn-junction serves as power source of the device.
Photo-Sensitive Silicon Package Embedding Self-Powered Electronic System
A self-powered electronic system comprises a first chip (401) of single-crystalline semiconductor embedded in a second chip (302) of single-crystalline semiconductor shaped as a container bordered by ridges. The assembled chips are nested and form an electronic device assembled, in turn, in a slab of weakly p-doped low-grade silicon shaped as a container (330) bordered by ridges (331). The flat side (335) of the slab includes a heavily n-doped region (314) forming a pn-junction (315) with the p-type bulk. A metal-filled deep silicon via (350) through the p-type ridge (331) connects the n-region with the terminal (322) on the ridge surface as cathode of the photovoltaic cell with the p-region as anode. The voltage across the pn-junction serves as power source of the device.
SEMICONDUCTOR MODULE
A semiconductor module includes an insulating substrate. A first and a second metal member are joined respectively to a side surface of the substrate. Each metal member has an opening formed therein. A first and a second conductive layer are on the upper surface of the substrate and spaced apart from each other. A first semiconductor chip is mounted on the first conductive layer. A first electrode of the first semiconductor chip is electrically connected to the first conductive layer, and a second electrode is electrically connected to the second conductive layer. A first terminal is electrically connected to the first conductive layer, and a second terminal is electrically connected to the second conductive layer. A sealing resin is disposed on the upper surface of the substrate to cover the first conductive layer, the second conductive layer, the first semiconductor chip, and portions of the first and second terminals.
Photo-sensitive silicon package embedding self-powered electronic system
A self-powered electronic system comprises a first chip (401) of single-crystalline semiconductor embedded in a second chip (302) of single-crystalline semiconductor shaped as a container bordered by ridges. The assembled chips are nested and form an electronic device assembled, in turn, in a slab of weakly p-doped low-grade silicon shaped as a container (330) bordered by ridges (331). The flat side (335) of the slab includes a heavily n-doped region (314) forming a pn-junction (315) with the p-type bulk. A metal-filled deep silicon via (350) through the p-type ridge (331) connects the n-region with the terminal (322) on the ridge surface as cathode of the photovoltaic cell with the p-region as anode. The voltage across the pn-junction serves as power source of the device.