A directional coupler (1) includes a substrate (10), a main line (20) formed directly or indirectly on the substrate (10), sub-lines (21, 22 and 23) at least part of each of which is formed directly or indirectly on the substrate (10) along the main line (20), a switch (30) switching connections among end portions of the plurality of sub-lines (21, 22 and 23), and detection output terminals (FWD and REV) connected to the sub-line (21), wherein, when looking at the substrate (10) in plan, the end portions of the sub-lines (21, 22 and 23) are disposed on the same side as the detection output terminals (FWD and REV) relative to the main line (20), and the sub-line (21) to which the detection output terminals (FWD and REV) are connected is overlapped with or surrounded by the sub-lines (22 and 23).

A directional coupler (1) includes a substrate (10), a main line (20) formed directly or indirectly on the substrate (10), sub-lines (21, 22 and 23) at least part of each of which is formed directly or indirectly on the substrate (10) along the main line (20), a switch (30) switching connections among end portions of the plurality of sub-lines (21, 22 and 23), and detection output terminals (FWD and REV) connected to the sub-line (21), wherein, when looking at the substrate (10) in plan, the end portions of the sub-lines (21, 22 and 23) are disposed on the same side as the detection output terminals (FWD and REV) relative to the main line (20), and the sub-line (21) to which the detection output terminals (FWD and REV) are connected is overlapped with or surrounded by the sub-lines (22 and 23).

Methods and devices to address antenna termination in absence of power supplies within an electronic circuit including a termination circuit and a switching circuit. The devices include regular NMOS devices that decouple the antenna from the switching circuit in absence of power supplies while the antenna is coupled to a terminating impedance having a desired impedance value through a native NMOS device. The antenna is coupled with the switching circuit via the regular NMOS device during powered conditions while the antenna is decoupled from the terminating impedance.

Methods and devices to address antenna termination in absence of power supplies within an electronic circuit including a termination circuit and a switching circuit. The devices include regular NMOS devices that decouple the antenna from the switching circuit in absence of power supplies while the antenna is coupled to a terminating impedance having a desired impedance value through a native NMOS device. The antenna is coupled with the switching circuit via the regular NMOS device during powered conditions while the antenna is decoupled from the terminating impedance.

Methods and devices to address antenna termination in absence of power supplies within an electronic circuit including a termination circuit and a switching circuit. The devices include regular NMOS devices that decouple the antenna from the switching circuit in absence of power supplies while the antenna is coupled to a terminating impedance having a desired impedance value through a native NMOS device. The antenna is coupled with the switching circuit via the regular NMOS device during powered conditions while the antenna is decoupled from the terminating impedance.

Methods and devices to address antenna termination in absence of power supplies within an electronic circuit including a termination circuit and a switching circuit. The devices include regular NMOS devices that decouple the antenna from the switching circuit in absence of power supplies while the antenna is coupled to a terminating impedance having a desired impedance value through a native NMOS device. The antenna is coupled with the switching circuit via the regular NMOS device during powered conditions while the antenna is decoupled from the terminating impedance.

Disclosed herein is an apparatus that includes a memory, a processor, and a rectangular waveguide coupled to the memory and the processor so that the memory and the processor communicate with each other via the rectangular waveguide.

Disclosed herein is an apparatus that includes a memory, a processor, and a rectangular waveguide coupled to the memory and the processor so that the memory and the processor communicate with each other via the rectangular waveguide.

A tunable power absorbing termination for a waveguide transmission line includes a section of waveguide having a front power feed end, a back power extracting end, and guidewalls extending between the front and back end thereof. A coolant circulating dielectric taper extends into the section of waveguide in an inclined orientation relative to a guidewall of the section of waveguide such that the point end of the taper extends substantially to the front power feed end of the waveguide section. The inclined orientation of the dielectric taper creates a free volume of space adjacent the taper behind the front power feed end of the waveguide section into which a tuner element is introduced which is position adjustable within the free volume of space to provide the power absorbing termination with a tuning capability.

A tunable power absorbing termination for a waveguide transmission line includes a section of waveguide having a front power feed end, a back power extracting end, and guidewalls extending between the front and back end thereof. A coolant circulating dielectric taper extends into the section of waveguide in an inclined orientation relative to a guidewall of the section of waveguide such that the point end of the taper extends substantially to the front power feed end of the waveguide section. The inclined orientation of the dielectric taper creates a free volume of space adjacent the taper behind the front power feed end of the waveguide section into which a tuner element is introduced which is position adjustable within the free volume of space to provide the power absorbing termination with a tuning capability.