The application relates to a charging system, including a number of m chargers each adapted for providing electrical energy to charge an electrical vehicle, whereby m is an integer and m≥1, a number of n outlet ports each adapted for electrically connecting the electrical vehicle, whereby n is an integer and n≥2, and a switchable connection matrix device including a number of n outlet port switches each adapted for electrically connecting at least one of the m chargers to one of the n outlet ports and, if m>1, a number of m−1 charger switches each adapted for electrically connecting two of the m chargers, whereby the switchable connection matrix device is adapted for detecting a short-circuit between at least two outlet ports and/or for generating a fault signal if the short-circuit between at least two outlet ports is detected.

The application relates to a charging system, including a number of m chargers each adapted for providing electrical energy to charge an electrical vehicle, whereby m is an integer and m≥1, a number of n outlet ports each adapted for electrically connecting the electrical vehicle, whereby n is an integer and n≥2, and a switchable connection matrix device including a number of n outlet port switches each adapted for electrically connecting at least one of the m chargers to one of the n outlet ports and, if m>1, a number of m−1 charger switches each adapted for electrically connecting two of the m chargers, whereby the switchable connection matrix device is adapted for detecting a short-circuit between at least two outlet ports and/or for generating a fault signal if the short-circuit between at least two outlet ports is detected.

The present disclosure relates to systems and methods to coordinate protective elements in an electric power system (EPS). In one embodiment, a system may include a Time vs Normalized Impedance Length subsystem to determine a first plurality of times of operation of a first protective element for a plurality of fault locations in the EPS and to determine a second plurality of times of operation of a second protective element for the plurality of fault locations in the EPS. A protective action subsystem may coordinate a response of the first protective element and the second protective element. The protective action subsystem may establish a pickup and a protective action for the second protective element. Upon detection of a fault in the EPS, one of the first protective action and the second protective action may be implemented based on one of the first pickup and the second pickup.

The present disclosure relates to systems and methods to coordinate protective elements in an electric power system (EPS). In one embodiment, a system may include a Time vs Normalized Impedance Length subsystem to determine a first plurality of times of operation of a first protective element for a plurality of fault locations in the EPS and to determine a second plurality of times of operation of a second protective element for the plurality of fault locations in the EPS. A protective action subsystem may coordinate a response of the first protective element and the second protective element. The protective action subsystem may establish a pickup and a protective action for the second protective element. Upon detection of a fault in the EPS, one of the first protective action and the second protective action may be implemented based on one of the first pickup and the second pickup.

An overcurrent protection circuit, a memory storage device, and an overcurrent protection method are disclosed. The overcurrent protection circuit includes a load switch, a first mirror circuit, a second mirror circuit, and a control circuit. The first mirror circuit is configured to generate a first node voltage in a state that a voltage difference between two terminals of the load switch is within a first voltage region. The second mirror circuit is configured to generate a second node voltage in a state that the voltage difference between the two terminals of the load switch is within a second voltage region. The control circuit is configured to cut off the load switch according to at least one of the first node voltage and the second node voltage to perform an overcurrent protection. The first voltage region is different from the second voltage region.

An overcurrent protection circuit, a memory storage device, and an overcurrent protection method are disclosed. The overcurrent protection circuit includes a load switch, a first mirror circuit, a second mirror circuit, and a control circuit. The first mirror circuit is configured to generate a first node voltage in a state that a voltage difference between two terminals of the load switch is within a first voltage region. The second mirror circuit is configured to generate a second node voltage in a state that the voltage difference between the two terminals of the load switch is within a second voltage region. The control circuit is configured to cut off the load switch according to at least one of the first node voltage and the second node voltage to perform an overcurrent protection. The first voltage region is different from the second voltage region.

An example computing system may include computer module bays, a power subsystem to supply power to computer modules installed in the computer module bays, and a system controller. The power subsystem may also implement overcurrent protection (OCP) based on an OCP threshold parameter. The system controller may include dynamic OCP adjustment logic that repeatedly updates the OCP threshold parameter during normal operation of the computing system. The dynamic OCP adjustment logic may update the OCP threshold parameter by determining a power requirement of the computing system based on a current configuration of the computing system, determining a new OCP threshold based on the power requirement, and instructing the power subsystem to change a value of the OCP threshold parameter to a new value based on the new OCP threshold.

An example computing system may include computer module bays, a power subsystem to supply power to computer modules installed in the computer module bays, and a system controller. The power subsystem may also implement overcurrent protection (OCP) based on an OCP threshold parameter. The system controller may include dynamic OCP adjustment logic that repeatedly updates the OCP threshold parameter during normal operation of the computing system. The dynamic OCP adjustment logic may update the OCP threshold parameter by determining a power requirement of the computing system based on a current configuration of the computing system, determining a new OCP threshold based on the power requirement, and instructing the power subsystem to change a value of the OCP threshold parameter to a new value based on the new OCP threshold.

A miniature circuit breaker for providing short circuit and overload protection is disclosed herein. The miniature circuit breaker features a field effect transistor (FET), which may be a depletion mode metal oxide semiconductor FET (D MOSFET), a junction field-effect transistor (JFET), or a silicon carbide JFET, the FET being connected to a bi-metallic switch, where the bi-metallic switch acts as a temperature sensing circuit breaker. In combination, the D MOSFET and bi-metallic switch are able to limit current to downstream circuit components, thus protecting the components from damage.

A miniature circuit breaker for providing short circuit and overload protection is disclosed herein. The miniature circuit breaker features a field effect transistor (FET), which may be a depletion mode metal oxide semiconductor FET (D MOSFET), a junction field-effect transistor (JFET), or a silicon carbide JFET, the FET being connected to a bi-metallic switch, where the bi-metallic switch acts as a temperature sensing circuit breaker. In combination, the D MOSFET and bi-metallic switch are able to limit current to downstream circuit components, thus protecting the components from damage.