Provided is a device including a series circuit in which a rectifying element and a fuse element are connected in series, in which one end on an anode side of the rectifying element in the series circuit is connected to a first connection point having a reference potential, and another end on a cathode side of the rectifying element in the series circuit is connected to a second connection point that is to have a potential higher than the reference potential. The device may further include a parallel circuit in which a plurality of the series circuits is connected in parallel. A rectifying characteristic of the rectifying element in at least one of the series circuits connected in parallel may be different from a rectifying characteristic of the rectifying element in at least another one of the series circuits connected in parallel.

Provided is a device including a series circuit in which a rectifying element and a fuse element are connected in series, in which one end on an anode side of the rectifying element in the series circuit is connected to a first connection point having a reference potential, and another end on a cathode side of the rectifying element in the series circuit is connected to a second connection point that is to have a potential higher than the reference potential. The device may further include a parallel circuit in which a plurality of the series circuits is connected in parallel. A rectifying characteristic of the rectifying element in at least one of the series circuits connected in parallel may be different from a rectifying characteristic of the rectifying element in at least another one of the series circuits connected in parallel.

Provided is an apparatus and method for protecting against unsafe electric current conditions. A protections circuit may be used in a device, such as an electric grill, that has one or more electric loads, such as heating elements. The protection circuit may protect against various failure scenarios, including, without limitation, instances of ground fault, over current, driver failure, and failure of a microprocessor. In response to a failure, the protection circuit may trip a latch relay or disable a triac driver to stop current from flowing.

Provided is an apparatus and method for protecting against unsafe electric current conditions. A protections circuit may be used in a device, such as an electric grill, that has one or more electric loads, such as heating elements. The protection circuit may protect against various failure scenarios, including, without limitation, instances of ground fault, over current, driver failure, and failure of a microprocessor. In response to a failure, the protection circuit may trip a latch relay or disable a triac driver to stop current from flowing.

Described are curve shapes that may be implemented in a transformer protector that provide enhanced fault protection. A transformer protector curve rating structure relates response curves to the transformer size and simplifies selection of response curves implemented within a transformer protector and associated transformer.

Described are curve shapes that may be implemented in a transformer protector that provide enhanced fault protection. A transformer protector curve rating structure relates response curves to the transformer size and simplifies selection of response curves implemented within a transformer protector and associated transformer.

A method and system for suppressing EMP-induced voltage surges due to detonation of a nuclear weapon at high altitude generating an EMP (HEMP) comprising E1, E2, and E3 component pulses. Surge protection assemblies are positioned intermediate a signal stream and a plurality of electronic device ports associated with a plurality of communication channels of networked devices. Single-channel multimode surge suppressing systems are combined to form multi-port multimode protection systems that connect directly to multiport networked devices supporting communication channels with mixed signals data and direct current power in Gigabit Ethernet networks supporting PoE. The surge suppressing systems mitigate differential and common mode induced interference and protect from overvoltage surges associated with E1, E2, and E3 components of the HEMP and mitigate the over-voltages to predetermined allowable levels within the predetermined time. The surge suppressing systems is interoperable with multimode PoE and support endpoint and midspan PoE devices of Gigabit networks.

The invention provides an over-current protection system. The over-current protection system includes a sensing device, a comparator, a first transistor, and a second transistor. The sensing device is adapted to sense a current flowing to an electrical device. The comparator is adapted to compare a signal received from the sensing device and a reference signal to generate any one of a high signal and a low signal, wherein the output of the comparator is connected to a control device. The first transistor is connected to the output signal of the comparator to control the first transistor, wherein the first transistor is in a conductive state when the output signal of the comparator is a high signal. The second transistor is connected to and controlled by the first transistor, wherein the second transistor is in a conductive state when the first transistor is in the conductive state.

The invention provides an over-current protection system. The over-current protection system includes a sensing device, a comparator, a first transistor, and a second transistor. The sensing device is adapted to sense a current flowing to an electrical device. The comparator is adapted to compare a signal received from the sensing device and a reference signal to generate any one of a high signal and a low signal, wherein the output of the comparator is connected to a control device. The first transistor is connected to the output signal of the comparator to control the first transistor, wherein the first transistor is in a conductive state when the output signal of the comparator is a high signal. The second transistor is connected to and controlled by the first transistor, wherein the second transistor is in a conductive state when the first transistor is in the conductive state.

An electrostatic discharge (ESD) circuit is used to protect an internal circuit. The ESD circuit includes: an ESD clamp, having a first terminal connected to a power and a second terminal connected to a ground voltage; and a first switch, connected between an ESD terminal of the ESD clamp and the internal circuit. A gate of the first switch is controlled by a state signal in the ESD clamp to turn off the first switch when an ESD event occurs on the first terminal of the ESD clamp and turn on the first switch when the ESD event does not occur.