Isolation circuit system and a signal isolation method thereof. The system includes: a power management unit, configured to output a first signal to a digital logic circuit when power down is detected in a first circuit area, and output a second signal to the digital logic circuit when no power down is detected in the first circuit area; the digital logic circuit, configured to perform logical processing on the first signal received from the power management unit before outputting an isolation signal to the isolation circuit, and perform logical processing on the second signal received from the power management unit before outputting a connection signal to the isolation circuit; and the isolation circuit, configured to block the interactive signal, or to output the interactive signal to a second circuit area after the interactive signal is processed through voltage stabilization.

An apparatus includes a substrate; a group III-Nitride barrier layer; a source electrically coupled to the group III-Nitride barrier layer; a gate on the group III-Nitride barrier layer; a drain electrically coupled to the group III-Nitride barrier layer; a p-region being arranged at or below the group III-Nitride barrier layer; and a recovery enhancement circuit configured to reduce an impact of an overload received by the gate. Additionally, at least a portion of the p-region is arranged vertically below at least one of the following: the source, the gate, an area between the gate and the drain.

An apparatus includes a substrate; a group III-Nitride barrier layer; a source electrically coupled to the group III-Nitride barrier layer; a gate on the group III-Nitride barrier layer; a drain electrically coupled to the group III-Nitride barrier layer; a p-region being arranged at or below the group III-Nitride barrier layer; and a recovery enhancement circuit configured to reduce an impact of an overload received by the gate. Additionally, at least a portion of the p-region is arranged vertically below at least one of the following: the source, the gate, an area between the gate and the drain.

Disclosed is a power control system for preemptive detection and prevention of electric disasters including a feed end that supplies power, a receiver end that receives the power from the feed end through a line, a power control device that calculates at least one of a loss power value, a leakage current value, a voltage drop value, and an impedance value based on a voltage value and a current value, which are measured at each of the feed end and the receiver end, detects whether the line is abnormal, by comparing the calculated at least one value with a corresponding predetermined threshold and identifying a change in electrical properties, and controls the power supplied to the receiver end when it is detected that the line is abnormal.

Examples relate to power supply system comprising a primary power supply to deliver a first power to a load and a secondary power supply that, in response to a failure in the primary power supply, is to deliver a second power to the load. The system further comprises a primary energy storage component coupled to the primary power supply that, in response to the failure in the primary power supply, is to deliver a third power to the load while the secondary power supply transitions from a lesser output power level to a greater output power level. The third power is at the same full-rated power level than the first power.

Examples relate to power supply system comprising a primary power supply to deliver a first power to a load and a secondary power supply that, in response to a failure in the primary power supply, is to deliver a second power to the load. The system further comprises a primary energy storage component coupled to the primary power supply that, in response to the failure in the primary power supply, is to deliver a third power to the load while the secondary power supply transitions from a lesser output power level to a greater output power level. The third power is at the same full-rated power level than the first power.

An electronic device is provided. The electronic device includes a housing, a first printed circuit board disposed inside the housing and including a first antenna, a first connector connected to the first antenna, a second antenna, and a second connector connected to the second antenna, memory storing one or more computer programs, a second printed circuit board spaced apart from the first printed circuit board inside the housing and including a power management circuit, a third connector electrically connected to the first connector, a fourth connector electrically connected to the second connector, a first detection circuit, and one or more processors communicatively coupled to the first detection circuit and the memory, a first cable electrically connecting the first connector and the third connector, and a second cable electrically connecting the second connector and the fourth connector, wherein the first detection circuit includes a first resistor disposed between the one or more processors and the power management circuit, and the first printed circuit board includes a second resistor branched between the first antenna and the first connector and electrically connected to the ground, and a third resistor branched between the second antenna and the second connector and electrically connected to the ground.

An electronic device is provided. The electronic device includes a housing, a first printed circuit board disposed inside the housing and including a first antenna, a first connector connected to the first antenna, a second antenna, and a second connector connected to the second antenna, memory storing one or more computer programs, a second printed circuit board spaced apart from the first printed circuit board inside the housing and including a power management circuit, a third connector electrically connected to the first connector, a fourth connector electrically connected to the second connector, a first detection circuit, and one or more processors communicatively coupled to the first detection circuit and the memory, a first cable electrically connecting the first connector and the third connector, and a second cable electrically connecting the second connector and the fourth connector, wherein the first detection circuit includes a first resistor disposed between the one or more processors and the power management circuit, and the first printed circuit board includes a second resistor branched between the first antenna and the first connector and electrically connected to the ground, and a third resistor branched between the second antenna and the second connector and electrically connected to the ground.

Aspects of the present disclosure disclose a power semiconductor device coupled to a load operable to draw a load current comprising a power switch having a first terminal coupled to the load and a controller coupled to a control terminal of the power switch. The controller comprises a gate driving circuit configured to provide control of the control terminal of the power switch during normal switching operations; an overvoltage detection circuit configured to detect an overvoltage event occurring at the first terminal of the power switch; and an overvoltage protection circuit configured to provide control of the control terminal of the power switch during detection of the overvoltage event.

Aspects of the present disclosure disclose a power semiconductor device coupled to a load operable to draw a load current comprising a power switch having a first terminal coupled to the load and a controller coupled to a control terminal of the power switch. The controller comprises a gate driving circuit configured to provide control of the control terminal of the power switch during normal switching operations; an overvoltage detection circuit configured to detect an overvoltage event occurring at the first terminal of the power switch; and an overvoltage protection circuit configured to provide control of the control terminal of the power switch during detection of the overvoltage event.