An ultra-low clamping voltage Surge Protection Module (SPM) is disclosed which utilizes a depletion mode MOSFET (D MOSFET). The SPM may be part of a circuit or a device and includes a primary protection stage and a secondary protection stage, with the D MOSFET being connected between the two stages. The SPM may include a single D MOSFET, dual D MOSFETs, or multiple D MOSFETs and the primary and secondary protection stages may be implemented with a number of different components. The SPM using D MOSFET(s) exhibits improved surge protection over circuits using inductors.

Examples described herein relate to a power management system. The power management system may include an input power filter coupled between a common power bus having a first voltage level and a load. The input power filter may include a variable impedance circuit coupled to an input capacitor. Further, the power management system may include a bus voltage controller coupled to the input power filter to detect a transient event causing a surge in a load current drawn by the load and to alter an impedance of the variable impedance circuit to limit an input current flowing via the variable impedance circuit, thereby maintaining voltage on the common power bus within a predefined range from the first voltage level.

Methods and apparatuses for protecting a low voltage (LV) circuit implemented with LV transistors are presented. Protection is provided via a protection circuit operating in a high voltage domain defined by a varying supply voltage and a reference ground. The protection circuit generates high side, V.sub.H, and low side, V.sub.L, voltages to the LV circuit, while protecting the LV circuits from high voltage and maintaining a minimum difference voltage, V.sub.H−V.sub.L. The protection circuit generates the difference voltage based on a voltage across a resistor of a resistor ladder that is coupled between the varying supply voltage and the reference ground. The protection circuit includes a clamp circuit that limits the minimum difference voltage for low values of the supply voltage. The protection circuit generates the difference voltage according to a nonlinear transfer function of the supply voltage that includes two linear segments having different slopes and a nonlinear segment that provides a continuous and smooth transition between the two linear segments.

The disclosed embodiments relate to method and/or device which is effective at cancelling or altering electrical signals or pulses, generated by, for example, digital electronic systems and components, that are induced, reflected or otherwise made present on the mains power supply conductors and/or the earthing or grounding conductor (if present.) The disclosed embodiments cancel these electrical signals thereby providing an effective means of preventing the exfiltration of various data from a computing or similar system by means of power line emissions. The disclosed embodiments may perform this subjugation by: altering the shape of the fundamental current and voltage waveforms and also altering and diminishing any non-fundamental frequency waveforms to a point where they are no longer measurable or detectable; and preventing the communication via inductive coupling of any electrical signals on mains current onto the grounding path or vice versa.

A protection circuit including a detection circuit, a current discharge element, a first transistor, and a second transistor is provided. The detection circuit is coupled between a first pad and a second pad to detect ESD events. In response to an ESD event, the detection circuit sets the detection signal to a predetermined level. The current discharge element is coupled between the first and second pads. In response to the detection signal being at the predetermined level, the current discharge element is turned on so that the ESD current passes through the current discharge element. The first transistor is coupled between a core circuit and the second pad. The second transistor is coupled between the first transistor and the second pad. In response to the detection signal being at the predetermined level, the second transistor is turned on to turn off the first transistor.

Flexible AC transmission system (FACTS) enabling distributed controls is a requirement for power transmission and distribution, to improve line balancing and distribution efficiency. These FACTS devices are electronic circuits that vary in the type of services they provide. All FACTS devices have internal circuitry to handle fault currents. Most of these circuits are unique in design for each manufacturer, which make these FACTS devices non-modular, non-interchangeable, expensive and heavy. One of the most versatile FACTS device is the static synchronous series compensator (SSSC), which is used to inject impedance into the transmission lines to change the power flow characteristics. The addition of integrated fault current handling circuitry makes the SSSC and similar FACTS devices unwieldy, heavy, and not a viable solution for distributed control. What is disclosed are modifications to FACTS devices that move the fault current protection external to the FACTS device and make them modular and re-usable.

An electromagnetic interference (EMI) circuit assembly includes a first, second, and third conductive layer. A protection component disposed between the first and second conductive layers. A dielectric layer is disposed between the second and the third conductive layers. The protection component is configured to protect a load from one or both of an overcurrent condition and an over temperature condition, and the third layer define a capacitor configured to suppress EMI signals.

Aspects of this disclosure relate to detecting and recording information associated with electrical overstress (EOS) events, such as electrostatic discharge (ESD) events. For example, in one embodiment, an apparatus includes an electrical overstress protection device, a detection circuit configured to detect an occurrence of the EOS event, and a memory configured to store information indicative of the EOS event.

Various embodiments include an apparatus for limiting voltage for a DC voltage network, wherein overvoltages resulting from switching operations occur between a first supply potential level and a second supply potential level of the DC voltage network. The apparatus comprises at least two limiter cells connected in series between the first supply potential level and the second supply potential level. Each limiter cell comprises a controllable switching element, a discharge resistor, and a capacitor, across all of which a voltage applied between the first supply potential level and the second supply potential level is dropped. During operation of the apparatus, based at least in part on the voltage dropped across the respective capacitor of a particular limiter cell, the controllable switching element of the limiter cell is switched on or off.

An apparatus and a method for operating an electric power network are disclosed. The electric power network is a compensated network arranged to be compensated by an arc suppression coil. An indication for an occurrence of an earth fault in the electric power network is received and the arc suppression coil is tuned away from resonance with respect to a resonance point of the electric power network, while the earth fault is present in the electric power network, to increase fault current in the electric power network for tripping one or more relays in the electric power network.