A circuit breaker and fault current managing branch thereof for power transmission using Direct Current (DC) applications. A surge suppressor having DC bus terminal, transmission line terminal, and common terminal. An auxiliary branch comprises a pre-chargeable capacitor. The capacitor is charged by the DC bus before the circuit breaker is closed for operation and the capacitor is connected to be discharged to the transmission line when the circuit breaker is opened in operation, for suppressing the surge voltage across the circuit breaker. The auxiliary branch may comprise a charge sub-branch comprising a first controlled semiconductor switch for closing the charge sub-branch and charging the capacitor by the DC bus before the circuit breaker is closed. The auxiliary branch may comprise a discharge sub-branch comprising a second controlled semiconductor switch for closing the discharge sub-branch and discharging the capacitor to the transmission line when the circuit breaker is opened in operation.

A CMTI circuit includes a first detector that receives one or more output signals from an oscillator and a first enable signal and generates a first detection signal when the received output signals are determined to be substantially not oscillating at a first time. The CMTI circuit further includes a first activation signal generator that generates a first activation signal in response to the first detection signal to resume oscillation of the output signals.

High voltage clamps with transient activation and activation release control are provided herein. In certain configurations, an integrated circuit (IC) includes a clamp electrically connected between a first node and a second node and having a control input. The IC further includes a first resistor-capacitor (RC) circuit that activates a detection signal in response to detecting a transient overstress event between the first node and the second node, an active feedback circuit that provides feedback from the first node to the control input of the clamp in response to activation of the detection signal, a second RC circuit that activates a shutdown signal after detecting passage of the transient overstress event based on low pass filtering a voltage difference between the first node and the second node, and a clamp shutdown circuit that turns off the clamp via the control input in response to activation of the shutdown signal.

An improved low profile surge protector is provided that minimizes the space necessary between powered devices and power sources. The present invention provides protection for overvoltage events while using existing, standard household outlets and allows for slimmer devices to mount as close as possible to a wall without leaving unappealing gaps between the device and the wall.

A power transfer device includes an oscillator circuit having a first node, a second node, and a control terminal. The oscillator circuit includes a cascode circuit comprising transistors having a first conductivity type and a first breakdown voltage. The cascode circuit is coupled to the control terminal, the first node, and the second node. The oscillator circuit includes a latch circuit coupled between the cascode circuit and a first power supply node. The latch circuit includes cross-coupled transistors having the first conductivity type and a second breakdown voltage. The first breakdown voltage is greater than the second breakdown voltage. The oscillator circuit may be configured to develop a pseudo-differential signal on the first node and the second node. The pseudo-differential signal may have a peak voltage of at least three times a voltage level of an input DC signal on a second power supply node.

A method and apparatus for operating a power distribution system, includes providing a solid state switch downstream of a power source and upstream of an electrical load, the solid state switch operable in a conducting mode that enabling conduction from upstream to the output and a non-conducting mode that disables conduction from the input to the output, and providing a transient voltage suppressor defining a breakdown voltage upstream of the solid state switch.

An electromagnetic interference (EMI) suppression circuit is interposed between an AC source and a DC power conversion system. The EMI suppression circuit includes a pi-type filter network having first and second filter input terminals and having first and second filter output terminals. The pi-type filter network includes a common mode choke and a differential mode choke between the input terminals and the output terminals. The pi-type filter network includes a first X-type capacitor across the first and second filter input terminals and includes a second X-type capacitor across the first and second filter output terminals. A first Y-type emission reduction capacitor is connected between the first filter input terminal and earth ground. At least a second Y-type emission reduction capacitor and a damping resistor are connected in series to form a series resistor-capacitor combination between the first filter output terminal and earth ground.

In order to provide a DC interrupting device that does not easily cause erroneous melting of current-limiting fuses at normal times with no fault current, and that can also deliver good current-limiting performance at the time of occurrence of fault current, the DC interrupting device includes: a (k1)th current path including a (k1)th current-limiting fuse, where k is an integer of not less than two and not more than N, and N is an integer of not less than two; and a kth current path connected in parallel to the (k1)th current path and including a kth current-limiting fuse. The inductance value of the inductance component of the kth current path is higher than the inductance value of the inductance component of the (k1)th current path.

An integrated circuit having a CML driver including a driver biasing network. A first output pad and a second output pad are connected to a voltage pad. A first driver is connected to the first output pad and the voltage pad. A second driver is connected to the second output pad and the voltage pad. A first ESD circuit is connected to the voltage pad, the first output pad, and the first driver. A second ESD circuit is connected to the voltage pad, the second output pad, and the second driver. The first ESD circuit biases the first driver toward a voltage of the voltage pad when an ESD event occurs at the first output pad, and the second ESD circuit biases the second driver toward the voltage of the voltage pad when an ESD event occurs at the second output pad.

A system and method for detecting and isolating an electromagnetic pulse (EMP) along first phase, second phase, and third phase electrical lines electrically connected to a monitored infrastructure so as to protect the monitored infrastructure, the method for detecting and isolating includes a phase unit receiving electric signal data from a sensor electrically connected individually to each of the first phase, second phase, and third phase electrical lines, respectively, upstream of and associated with the monitored infrastructure. The method includes determining if the received electric signal data associated with the respective electrical line is indicative of an E1 component of an EMP and, if so, actuating an isolation subsystem in less than 300 nanoseconds to electrically isolate the respective electrical line against electrical communication with the monitored infrastructure.