A multi-channel transient voltage suppressor includes a plurality of diode strings, a Zener diode and a diode array. The diode strings respectively have a plurality of input output terminals. The diode array includes a first bypass diode and a second bypass diode. The first bypass diode is coupled between a common bus and a ground terminal, and provides a forward turned-on path from the ground terminal to the common bus. The second bypass diode is coupled to the first bypass diode in parallel, and provides a reverse turned-on path from the common bus to the ground terminal. A current dissipation path is formed between each of the input output terminals and the ground terminal by the diode array.

A transient voltage suppressing (TVS) integrated circuit includes an input output pin, a ground pin, a substrate, a first TVS die and a second TVS die. The substrate provides a common bus. The first TVS die is disposed on the substrate, and includes a first input output terminal and a first reference ground terminal. The second TVS die is disposed on the substrate and includes a second input output terminal and a second reference ground terminal. The second reference ground terminal is electrically coupled to the first reference ground terminal through the common bus, and the first input output terminal is coupled to the first input out pin, and the second input output terminal is coupled to a ground pin.

A compensation filter and a method for activating a compensation filter are disclosed. In an embodiment a compensation filter includes an operational amplifier, a capacitive element, a first and a second resistive element and a current converter. The compensation filter is configured to attenuate a common mode interference in a critical frequency range.

The invention is related to a luminaire comprising a lighting module for emitting light, a driver for driving operation of the lighting module, a runtime overvoltage protection device for protecting the lighting module and the driver from exposure to overvoltage above a first overvoltage tripping limit, and a provisional overvoltage protection device that is connected in parallel to the runtime overvoltage protection device and has a second overvoltage tripping limit. The second tripping limit smaller than the first overvoltage tripping limit so that the provisional overvoltage protection device provides overvoltage protection to the runtime overvoltage protection device. Moreover, the provisional overvoltage protection device is deactivatable.

A protected capacitor system/method implementing enhanced transient over-voltage suppression is disclosed. The system/method incorporates one or more surge suppression devices (SSDs) proximally located and in parallel with a capacitor structure to produce an overall protected capacitor structure having enhanced reliability and simultaneous ability to resist transient overvoltage conditions. The SSDs are formed from series combinations of transient voltage surge suppressors (TVSs) (metal oxide varistor (MOV), diode for alternating current (DIAC), and/or silicon diode for alternating current (SIDAC)) and corresponding shunt diode rectifiers (SDRs) and placed in parallel across a capacitor structure to locally suppress voltage transients across the capacitor structure in excess of the voltage rating of the capacitor structure. The parallel shunting TVB/SDR pairs may be integrated into a printed circuit board (PCB) assembly that is externally attached to the capacitor structure or encapsulated in an enclosure incorporating the capacitor structure.

A protected capacitor system/method implementing enhanced transient over-voltage suppression is disclosed. The system/method incorporates one or more surge suppression devices (SSDs) proximally located and in parallel with a capacitor structure to produce an overall protected capacitor structure having enhanced reliability and simultaneous ability to resist transient overvoltage conditions. The SSDs are formed from series combinations of transient voltage surge suppressors (TVSs) (metal oxide varistor (MOV), diode for alternating current (DIAC), and/or silicon diode for alternating current (SIDAC)) and corresponding shunt diode rectifiers (SDRs) and placed in parallel across a capacitor structure to locally suppress voltage transients across the capacitor structure in excess of the voltage rating of the capacitor structure. The parallel shunting TVS/SDR pairs may be integrated into a printed circuit board (PCB) assembly that is externally attached to the capacitor structure or encapsulated in an enclosure incorporating the capacitor structure.

An IC, comprising a first rail supply, a second rail supply, an external pad coupled to one of the first rail supply and the second rail supply, and an ESD protection circuit coupled to the external pad. The ESD protection circuit includes a slew rate detector coupled to the external pad, an amplifier coupled to an output of the slew rate detector, a one-shot coupled to an output of the amplifier, and a clamp circuit coupled an output of the one-shot.

An AC switching arrangement is provided with an energy transfer arrangement connected in parallel with a switching mechanism. The energy transfer arrangement comprises a capacitance arrangement and a diode arrangement. The switching mechanism normally closed in a first state, and on reception of a signal indicating the second state, the switching mechanism is arranged to open. When the switching mechanism is in the second state, the diode arrangement is arranged in each AC half cycle to enable energy (source energy, stored inductance energy, etc.) to transfer from the grid to the capacitance arrangement but to prevent energy transfer from the capacitance arrangement back to the grid.

A transmission circuit including four transmission component sets for Ethernet is provided. For each of the transmission component sets, a first capacitor and a first inductor are cascaded, the first inductor is coupled to the Ethernet connector via the first transmission line (TL), the first capacitor is coupled to the Ethernet chip via the second TL; a second capacitor and a second inductor are cascaded, the second inductor is coupled to the Ethernet connector via the third TL, the second capacitor is coupled to the Ethernet chip via the fourth TL; a first component set is coupled between a first contact and a second contact, the first contact is located between the first capacitor and the first inductor, and the second contact is located between the second capacitor and the second inductor; and a second component set is coupled between the second TL and the fourth TL.

In order to achieve a universal, flexible and highly integrated operating device for driving various lamps, ensuring the protection of the entire operating device and of the appliances connected thereto by means of staggered protective measures at both the input and the output, starting from the preamble of claim 1, a first branch for connecting a lamp to a first of the interface circuits (SS1) and a second branch for connecting at least one communication module to a second of the interface circuits (SS2) are connected to the coarse protection circuit (G) which short-circuits an overvoltage of the mains voltage occurring at the input of the operating device. In the first branch, a line filter (NF) is connected to the coarse protection circuit (G) and a clamp circuit (K) consisting of the fine protection circuit (F) and of a first energy absorber (E1) is connected to the line filter (NF). When the residual pulse voltage is too high, the fine protection circuit (F) activates the first energy absorber (E1), the overvoltage pulse is short-circuited and the short-circuit is deactivated again when the mains voltage reaches the next zero crossing. A second energy absorber (E2) which, when it is switched on, limits the current with the aid of a temperature-dependent resistor (NTC), is connected to the first energy absorber (E1). Moreover, the first interface circuit (SS1) comprises a protection circuit (ÜS) against overvoltage and overcurrent, and an intermediate protection circuit (M) consisting of a transmitter (Ü) and of a first fine protection circuit (F1) is connected to the coarse protection circuit (G) in the second branch. A filter (FK) for separating communication signals fed in parallel into the power supply grid is connected to the first fine protection circuit (F) and a second fine protection circuit (F2) is connected to this filter (FK). In order to protect the second interface circuit (SS2) of the operating device from overvoltage and overcurrent coming from the communication module and acting upon the operating device, the second interface circuit (SS2) comprises a protection circuit (ÜS) against overvoltage and overcurrent. The invention is used in the field of protection systems against overvoltage.