A fault managed power system (FMPS) and method monitors and detects fault currents in PoE, PFC, and other cables that indicate likely human contact with cable conductors. The level of current detected through the human body combined with a fast response time limits the energy to prevent a person from experiencing ventricular fibrillation, resulting in a so-called touch-safe level. For overload and short-circuit fault protection, the system automatically and immediately removes power from the cables. This limits the amount of energy provided into the fault, thereby maintaining touch-safe operation and also preventing electrical fires and system component protection. The system/method can accomplish this even at voltage levels considerably higher than existing touch-safe standards, for example, Class 2 (below 50 Vac) power supplies. Such a system/method allows the amount of power in applications like PoE and PFC to be safely increased to levels much greater than the current maximum (100 W).

A protection function of an electronic device is realized with a lower cost. A load drive circuit 102 includes: transistors Qa and Qb for protection of an N-channel type connected between a power source terminal P1 and a power source end P7 for driving; an inverter circuit 14 that drives a load based on an input drive control signal Sd, the inverter circuit 14 being disposed between the power source end P7 for driving and a ground potential; and a booster unit 16 including a capacitor C1 having one terminal connected to an output end of the inverter circuit 14, the booster unit 16 generating, across another terminal of the capacitor C1, a voltage exceeding a power source voltage Vdc, and applying the voltage to control electrodes of the transistors Qa and Qb for protection.

A radial-leaded over-current protection device comprises a PTC element, a first electrode lead, a second electrode lead and an electrically insulating encapsulation layer. The PTC element comprises a first conductive layer, a second conductive layer and a PTC material layer laminated therebetween. The PTC material layer comprises crystalline polymer and conductive filler dispersed therein. The first electrode lead has an end connecting to the first conductive layer, whereas the second electrode lead has an end connecting to the second conductive layer. The electrically insulating encapsulation layer includes a fluorine-containing polymer, and wraps around an entire outer surface of the PTC element and the ends of the first and second electrodes connecting to the PTC element. The electrically insulating encapsulation layer has a thickness of 10.sup.2˜10.sup.5 nm, and the radial-leaded over-current protection device has an initial resistance R.sub.bf of 0.0017˜0.0027Ω.

A circuit is disclosed. The circuit includes a first transistor including a first drain terminal, a first gate terminal and a first source terminal, a depletion-mode transistor including a second drain terminal, a second gate terminal and a second source terminal, the second drain terminal connected to the first drain terminal, the depletion-mode transistor arranged to sense a first voltage at the first drain terminal and generate a second voltage at the second source terminal, and a comparator arranged to receive the second voltage, and transition the first transistor from an on state to an off state in response to the first transistor entering its saturation region of operation. In one aspect, the first transistor includes gallium nitride (GaN). In another aspect, the circuit further includes a logic circuit arranged to receive an output voltage generated by the comparator and to drive the first gate terminal.

A surge protection apparatus may include an input terminal; an output terminal, the output terminal electrically coupled to the input terminal; a ground terminal, the ground terminal electrically coupled to the input terminal and output terminal; a positive temperature coefficient (PTC) fuse, the PTC fuse connected in electrical series between the input terminal and output terminal; a crowbar device, the crowbar device electrically connected to the ground terminal and output terminal, wherein the crowbar device is in electrical series with the PTC fuse between the input terminal and ground terminal; and a central frame portion, the central frame portion electrically coupled to the input terminal, output terminal and ground terminal, wherein the crowbar device is disposed on a first side of the central frame portion and the PTC fuse is disposed on a second side of the central frame portion, opposite the first side.

In an embodiment, an apparatus includes a source device including a first current limiter and a second current limiter in parallel with each other and a first transformer and a second transformer; a load device includes a third transformer and a fourth transformer in parallel with each other; and an Ethernet cable is electrically coupled between the source device and the load device, the Ethernet cable including first twisted pair lines and second twisted pair lines. A direct current (DC) voltage is provided to the first current limiter and the second current limiter, the first transformer is electrically coupled to an output of the first current limiter, and the second transformer is electrically coupled to an output of the second current limiter. The DC voltage is transmitted to the third transformer and the fourth transformer in parallel with each other via the first twisted pair lines and the second twisted pair lines. The first twisted pair lines and second twisted pair lines are included in an Ethernet cable electrically coupled between the source device and the load device.

In an embodiment, an apparatus includes a source device including a first current limiter and a second current limiter in parallel with each other and a first transformer and a second transformer; a load device includes a third transformer and a fourth transformer in parallel with each other; and an Ethernet cable is electrically coupled between the source device and the load device, the Ethernet cable including first twisted pair lines and second twisted pair lines. A direct current (DC) voltage is provided to the first current limiter and the second current limiter, the first transformer is electrically coupled to an output of the first current limiter, and the second transformer is electrically coupled to an output of the second current limiter. The DC voltage is transmitted to the third transformer and the fourth transformer in parallel with each other via the first twisted pair lines and the second twisted pair lines. The first twisted pair lines and second twisted pair lines are included in an Ethernet cable electrically coupled between the source device and the load device.

The invention relates to a superconducting electrical switch. The switch comprises two parallel branches of superconducting material in a loop, and a magnetic field generator which generates a time-varying magnetic field through the loop in a direction generally parallel to the axis of the loop. The magnetic field generator is selectively activated and de-activated to switch the electrical switch between a low-resistance state and a higher-resistance state. In the low-resistance state, there is no magnetic field through the loop and transport current flows through the loop. In the higher-resistance state, a magnetic field through the loop induces a screening current such that the sum of the transport current and the screening current is substantially equal to the critical current or is greater than the critical current of the superconducting material. The switch may be used in, for example, a rectifier or fault current limiter.

An ESD protection circuit in an interface circuit has a first diode coupled between a first power source of an integrated circuit device and an input/output pad of the integrated circuit device, a second diode coupled between a second power source of the integrated circuit device and the input/output pad, and a resistive element that couples the second diode to the first diode and to the input/output pad. The first power source supplies a driver circuit coupled to the input/output pad. The second power source supplies one or more core circuits of the integrated circuit device. The resistive element may be implemented as an interconnect configured to provide a resistance that produces a voltage differential between a terminal of the second diode and a corresponding terminal of the first diode during an electrostatic discharge event.

An ESD protection circuit in an interface circuit has a first diode coupled between a first power source of an integrated circuit device and an input/output pad of the integrated circuit device, a second diode coupled between a second power source of the integrated circuit device and the input/output pad, and a resistive element that couples the second diode to the first diode and to the input/output pad. The first power source supplies a driver circuit coupled to the input/output pad. The second power source supplies one or more core circuits of the integrated circuit device. The resistive element may be implemented as an interconnect configured to provide a resistance that produces a voltage differential between a terminal of the second diode and a corresponding terminal of the first diode during an electrostatic discharge event.