An image forming apparatus includes an engine unit to perform an image forming job; an engine control unit to control the operation of the engine unit; a brushless direct current (BLDC) motor to drive the engine unit; a sensor unit to sense electric angle information and driving velocity information of the BLDC motor; a communication interface to receive a digital control command with respect to the BLDC motor from the engine control unit; a driving signal unit to generate a driving signal to control the BLDC motor; and a digital control unit to control the operation of the driving signal unit in a digital phase locked loop (PLL) manner for feedback controls the BLDC motor, based on the received digital control command, the detected electric angle information and the driving velocity information and a digital gain value as a control factor with respect to the BLDC motor.

An apparatus for detecting speed of a motor is disclosed, the apparatus including an amplifier configured to amplify a two-phase sine-wave signal inputted from an encoder based on rotation of a motor; a first conversion unit configured to convert the two-phase sine-wave signal to a digital data; a second conversion unit configured to convert the two-phase sine-wave signal to a square-wave signal; a counter unit configured to accumulate by counting the square-wave signal; and a speed determination unit configured to determine a speed of the motor, by receiving the digital data from the first conversion unit and the accumulated count from the counter unit.

An apparatus for detecting speed of a motor is disclosed, the apparatus including an amplifier configured to amplify a two-phase sine-wave signal inputted from an encoder based on rotation of a motor; a first conversion unit configured to convert the two-phase sine-wave signal to a digital data; a second conversion unit configured to convert the two-phase sine-wave signal to a square-wave signal; a counter unit configured to accumulate by counting the square-wave signal; and a speed determination unit configured to determine a speed of the motor, by receiving the digital data from the first conversion unit and the accumulated count from the counter unit.

The present disclosure illustrates a motor drive circuit. The motor drive circuit includes a resistor module, a multiplexer, a data control unit, an analog-to-digital converter and a register. The resistor module receives an input voltage and generates at least one parameter voltage. The parameter voltage is associated with a motor speed curve of a motor. The multiplexer receives the parameter voltage. The data control unit controls the multiplexer to output the parameter voltage. The analog-to-digital converter receives the parameter voltage and converts the parameter voltage to digital form, and then outputs the digital parameter voltage to the data control unit. The register stores the digital parameter voltage outputted by the data control unit. A controller determines the motor speed curve according to the digital parameter voltage stored in the register, and drives the motor in response to the motor speed curve.

The present invention relates to a control device for a radiator fan, in particular for a radiator fan of a motor vehicle, having an external control device which is designed to generate a controlled variable for an electric motor of the radiator fan according to a first predefined setpoint value, and having an internal control device which is designed to control the motor current of the electric motor of the radiator fan according to a predefined first motor current maximum value if the controlled variable which is generated by the external control device assumes such a value that the motor current exceeds the predefined first motor current maximum value. The present invention also relates to a radiator fan arrangement and to a method for controlling a radiator fan.

A semiconductor device for generating PWM modulation signals, for example an optimized pulse pattern OPP is provided. An ADC 42 outputs the angle of the motor, and is connected to a coprocessor 52 for example a digital signal processor DSP. The coprocessor 52 has an observer 44 connected to the angle inputs for generating a motor angle and a look up table 48 for generating a PWM signal as a direct function of the generated motor angle A PWM signal is output to timer unit 50. A calculating unit 46 has an input connected to the coprocessor 52, the calculating unit being arranged to select a look up table based on the generated motor angle and to store the selected look up table as the look up table 48.

A semiconductor device for generating PWM modulation signals, for example an optimized pulse pattern OPP is provided. An ADC 42 outputs the angle of the motor, and is connected to a coprocessor 52 for example a digital signal processor DSP. The coprocessor 52 has an observer 44 connected to the angle inputs for generating a motor angle and a look up table 48 for generating a PWM signal as a direct function of the generated motor angle A PWM signal is output to timer unit 50. A calculating unit 46 has an input connected to the coprocessor 52, the calculating unit being arranged to select a look up table based on the generated motor angle and to store the selected look up table as the look up table 48.