A two-walled coupled inductor includes an outer wall and an inner wall separated by a slit. The outer wall has a first width and the inner wall has a second width. The inner wall and the outer wall may be configured to be coupled to oscillator circuitry. The two-walled coupled inductor may include an electrically conductive stub coupled to the outer wall to be coupled to a power supply. A common mode current flows through the outer wall, and the stub if one is present, and a differential mode current flows through both the outer wall and the inner wall, but not the stub. The first and second widths, and dimensions of the stub, may be sized to increase an inductance of the common mode compared to an inductance of the differential mode, thereby reducing phase noise of the inductor-based resonator.

A two-walled coupled inductor includes an outer wall and an inner wall separated by a slit. The outer wall has a first width and the inner wall has a second width The inner wall and the outer wall may be configured to be coupled to oscillator circuitry. The two-walled coupled inductor may include an electrically conductive stub coupled to the outer wall to be coupled to a power supply. A common mode current flows through the outer wall, and the stub if one is present, and a differential mode current flows through both the outer wall and the inner wall, but not the stub. The first and second widths, and dimensions of the stub, may be sized to increase an inductance of the common mode compared to an inductance of the differential mode, thereby reducing phase noise of the inductor-based resonator.

A two-walled coupled inductor includes an outer wall and an inner wall separated by a slit. The outer wall has a first width and the inner wall has a second width The inner wall and the outer wall may be configured to be coupled to oscillator circuitry. The two-walled coupled inductor may include an electrically conductive stub coupled to the outer wall to be coupled to a power supply. A common mode current flows through the outer wall, and the stub if one is present, and a differential mode current flows through both the outer wall and the inner wall, but not the stub. The first and second widths, and dimensions of the stub, may be sized to increase an inductance of the common mode compared to an inductance of the differential mode, thereby reducing phase noise of the inductor-based resonator.

An oscillator apparatus includes an oscillator core circuit. The oscillator core circuit includes an inverting transconductance amplifier, at least one first capacitor, at least one second capacitor, and a resonator. The at least one first capacitor is connected between an input of the inverting transconductance amplifier and a ground level. The at least one second capacitor is connected between an output of the inverting transconductance amplifier and the ground level. The resonator has a first port connected to the input of the inverting transconductance amplifier and a second port connected to the output of the inverting transconductance amplifier. The first port is decoupled from the second port.

An oscillator apparatus includes an oscillator core circuit. The oscillator core circuit includes an inverting transconductance amplifier, at least one first capacitor, at least one second capacitor, and a resonator. The at least one first capacitor is connected between an input of the inverting transconductance amplifier and a ground level. The at least one second capacitor is connected between an output of the inverting transconductance amplifier and the ground level. The resonator has a first port connected to the input of the inverting transconductance amplifier and a second port connected to the output of the inverting transconductance amplifier. The first port is decoupled from the second port.

Disclosed are methods and apparatuses for reducing fractional spurs in an All-Digital Phase Lock Loop (ADPLL). An exemplary apparatus includes a crystal oscillator configured to generate a first frequency reference signal, a non-integer divider coupled to the crystal oscillator and configured to divide the first frequency reference signal by a non-integer variable to generate a second frequency reference signal, and a multiplexor coupled to the non-integer divider and the crystal oscillator and configured to output the first frequency reference signal or the second frequency reference signal to the ADPLL, wherein the multiplexor is configured to output the second frequency reference signal based on the ADPLL being tuned to a low fractionality channel.

An oscillator includes first, second, and third current sources, a resistor having first and second terminals, first and second capacitors each having first and second terminals, a switch circuit through which each of the current sources is connectable to the first terminal of one of the resistor and the two capacitors to supply current thereto, a comparator, and switch controller configured to generate control signals for the switch circuit and an oscillation output signal for each of multiple periods based on an output signal from the comparator. During one of the periods, the switch circuit is controlled to connect the first current source to the first terminal of the first capacitor, the second current source to the first terminal of the resistor, the first terminal of the resistor to a first input of the comparator, and the first terminal of the first capacitor to a second input of the comparator.

An oscillator includes first, second, and third current sources, a resistor having first and second terminals, first and second capacitors each having first and second terminals, a switch circuit through which each of the current sources is connectable to the first terminal of one of the resistor and the two capacitors to supply current thereto, a comparator, and switch controller configured to generate control signals for the switch circuit and an oscillation output signal for each of multiple periods based on an output signal from the comparator. During one of the periods, the switch circuit is controlled to connect the first current source to the first terminal of the first capacitor, the second current source to the first terminal of the resistor, the first terminal of the resistor to a first input of the comparator, and the first terminal of the first capacitor to a second input of the comparator.

An integrated electronic circuit is provided. The integrated electronic circuit includes a transconductance cell formed from transconductance cell devices. The integrated electronic circuit further includes active and passive decoupling circuits. The integrated electronic circuit also includes an oscillator having a tank that is direct current decoupled from the transconductance cell devices using the active and passive decoupling circuits to increase voltage swing and decrease phase noise of the oscillator.

An integrated electronic circuit is provided. The integrated electronic circuit includes a transconductance cell formed from transconductance cell devices. The integrated electronic circuit further includes active and passive decoupling circuits. The integrated electronic circuit also includes an oscillator having a tank that is direct current decoupled from the transconductance cell devices using the active and passive decoupling circuits to increase voltage swing and decrease phase noise of the oscillator.