A fixed-geometry probe for exchanging microwave energy with a cavity resonator is easy to manufacture, reliable and readily adjustable external to the cavity to select a coupling coefficient. The probe includes a transmission line that enters, turns and exits the cavity resonator. A first end of the transmission line lies outside the cavity resonator for connection to a microwave circuit to exchange microwave energy. A portion of the transmission line's outer conductor(s) is removed within the cavity resonator to form a fixed-geometry radiating element to exchange microwave energy with the cavity resonator in accordance with the coupling coefficient. The line's outer conductor is connected to the cavity resonator on either side of the radiating element. A second end of the transmission line is terminated outside the cavity resonator with a terminating impedance creating a mismatch with the line's characteristic impedance to create a reflective stub. The coupling coefficient is controlled by the length of the reflective stub and terminating impedance.

An oscillator circuit includes an oscillator transistor (Q1) having respective first, second, and control terminals, the oscillator transistor being arranged to generate a microwave oscillating signal at the first terminal. A surface integrated waveguide resonator (Y1) is connected to the second terminal of the oscillator transistor (Q1). An active bias circuit portion (202) including a negative feedback arrangement is between the first terminal of the oscillator transistor (Q1) and the control terminal of the oscillator transistor (Q1), the active bias circuit portion being arranged to supply a bias current to the control terminal of the oscillator transistor (Q1). The bias current is dependent on a voltage at the first terminal of the oscillator transistor (Q1) multiplied by a negative gain.

An oscillator has a feedback loop with a signal output, a multi-pole resonator, and a gain block. The gain block applies a gain sufficient to generate a stable oscillation signal at the signal output; and the multi-pole resonator is tunable between two or more resonance modes.

Frequency synthesizers having reduced phase noise and a small step size. One example can provide frequency synthesizers having low phase noise by eliminating dividers in a feedback path and instead employing frequency converters, such as mixers. Step size can be further reduced by providing frequency converters in a reference signal feedforward path. Acquisition time can be decreased by employing a fast-acquisition phase-locked loop that is switched out after acquisition in favor of a low phase-noise phase-locked loop. Another example can reduce phase noise by employing a YIG oscillator. To improve acquisition time, a first, faster phase-locked loop can be used to lock to a signal before switching to a second, slower phase-locked loop that includes the YIG oscillator. Another example can provide low noise by including phase-locked loops that operate in a frequency range having low thermal noise while a frequency of an output signal varies over a wide range.

Frequency synthesizers having reduced phase noise and a small step size. One example can provide frequency synthesizers having low phase noise by eliminating dividers in a feedback path and instead employing frequency converters, such as mixers. Step size can be further reduced by providing frequency converters in a reference signal feedforward path. Acquisition time can be decreased by employing a fast-acquisition phase-locked loop that is switched out after acquisition in favor of a low phase-noise phase-locked loop. Another example can reduce phase noise by employing a YIG oscillator. To improve acquisition time, a first, faster phase-locked loop can be used to lock to a signal before switching to a second, slower phase-locked loop that includes the YIG oscillator. Another example can provide low noise by including phase-locked loops that operate in a frequency range having low thermal noise while a frequency of an output signal varies over a wide range.

An electronic device may include a harmonic rejection mixer with a delay line, mixer array, and load. The delay line may generate LO phases. Each mixer in the array may have a first input that receives an LO phase and a second input coupled to an input switch and the first input of the next mixer circuit through an inter-mixer switch. The load may include a set of switches. In a transmit mode, the input switches and set of switches may be closed while the inter-mixer switches are open. In a self-calibration mode, the input switches and set of switches may be open while the inter-mixer switches are closed. A controller may sweep through phase codes for the programmable delay line while storing a digital output from the load. The controller may calibrate the phase code based on the digital output.

The present disclosure discloses a crystal oscillator circuit on a PCB. The crystal oscillator circuit includes a crystal oscillator including an input end, an output end, a first grounding end and a second grounding end; a first capacitor with one end connected to the input end; and a second capacitor with one end connected to the output end, wherein the first grounding end is connected to a first grounding hole, the second grounding end is connected to a second grounding hole, the other end of the first capacitor is connected to a third grounding hole, the other end of the second capacitor is connected to a fourth grounding hole. The present disclosure further discloses the PCB and a server.

The present disclosure discloses a crystal oscillator circuit on a PCB. The crystal oscillator circuit includes a crystal oscillator including an input end, an output end, a first grounding end and a second grounding end; a first capacitor with one end connected to the input end; and a second capacitor with one end connected to the output end, wherein the first grounding end is connected to a first grounding hole, the second grounding end is connected to a second grounding hole, the other end of the first capacitor is connected to a third grounding hole, the other end of the second capacitor is connected to a fourth grounding hole. The present disclosure further discloses the PCB and a server.

Rotary traveling wave oscillator-based (RTWO-based) frequency multipliers are provided herein. In certain embodiments, an RTWO-based frequency multiplier includes an RTWO that generates a plurality of clock signal phases of a first frequency, and an edge combiner that processes the clock signal phases to generate an output clock signal having a second frequency that is a multiple of the first frequency. The edge combiner can be implemented as a logic-based combining circuit that combines the clock signal phases from the RTWO. For example, the edge combiner can include parallel stacks of transistors operating on different clock signal phases, with the stacks selectively activating based on timing of the clock signal phases to generate the output clock signal of multiplied frequency.

Rotary traveling wave oscillator-based (RTWO-based) frequency multipliers are provided herein. In certain embodiments, an RTWO-based frequency multiplier includes an RTWO that generates a plurality of clock signal phases of a first frequency, and an edge combiner that processes the clock signal phases to generate an output clock signal having a second frequency that is a multiple of the first frequency. The edge combiner can be implemented as a logic-based combining circuit that combines the clock signal phases from the RTWO. For example, the edge combiner can include parallel stacks of transistors operating on different clock signal phases, with the stacks selectively activating based on timing of the clock signal phases to generate the output clock signal of multiplied frequency.