Patent classifications
H03B5/20
Hybrid RC/Crystal Oscillator
An oscillator includes a tunable oscillator, a phase detector circuit communicatively coupled with an output of the tunable oscillator and an input to the oscillator, and an oscillator controller circuit configured to adjust frequency of the tunable oscillator based upon phase detection between output of the tunable oscillator and output of an external resonant element received at the input to the oscillator.
Circuit device, oscillator, electronic apparatus, and vehicle
A circuit device includes an oscillation circuit configured to cause a resonator to oscillate, a clock signal output circuit configured to output a clock signal based on an oscillation signal from the oscillation circuit, a temperature compensation circuit configured to perform temperature compensation on an oscillation frequency of the oscillation signal, a low-potential-side power supply pad to which low-potential-side electric power is supplied, a high-potential-side power supply pad to which high-potential-side electric power is supplied, and an inter-power-supply capacitor provided between a low-potential-side power supply line electrically continuous with the low-potential-side power supply pad and a high-potential-side power supply line electrically continuous with the high-potential-side power supply pad. The inter-power-supply capacitor is formed of at least two metal layers provided in a region where the temperature compensation circuit is disposed in a plan view.
Circuit device, oscillator, electronic apparatus, and vehicle
A circuit device includes an oscillation circuit configured to cause a resonator to oscillate, a clock signal output circuit configured to output a clock signal based on an oscillation signal from the oscillation circuit, a temperature compensation circuit configured to perform temperature compensation on an oscillation frequency of the oscillation signal, a low-potential-side power supply pad to which low-potential-side electric power is supplied, a high-potential-side power supply pad to which high-potential-side electric power is supplied, and an inter-power-supply capacitor provided between a low-potential-side power supply line electrically continuous with the low-potential-side power supply pad and a high-potential-side power supply line electrically continuous with the high-potential-side power supply pad. The inter-power-supply capacitor is formed of at least two metal layers provided in a region where the temperature compensation circuit is disposed in a plan view.
ENABLING AN EXTERNAL RESISTOR FOR AN OSCILLATOR
In an example, a system includes an oscillator circuit on a chip. The oscillator circuit includes a charging current generator including a current mirror, an amplifier, and an on-chip resistor, where the on-chip resistor is coupled to a pin on the chip. The oscillator circuit also includes oscillator circuitry coupled to the charging current generator, where the oscillator circuitry includes a comparator, a phase generator, a first capacitor coupled to a first resistor, and a second capacitor coupled to a second resistor. The system also includes an external resistor coupled to the pin, where the external resistor is external to the chip. The system includes an external capacitor coupled to the pin, where the external capacitor is external to the chip.
ENABLING AN EXTERNAL RESISTOR FOR AN OSCILLATOR
In an example, a system includes an oscillator circuit on a chip. The oscillator circuit includes a charging current generator including a current mirror, an amplifier, and an on-chip resistor, where the on-chip resistor is coupled to a pin on the chip. The oscillator circuit also includes oscillator circuitry coupled to the charging current generator, where the oscillator circuitry includes a comparator, a phase generator, a first capacitor coupled to a first resistor, and a second capacitor coupled to a second resistor. The system also includes an external resistor coupled to the pin, where the external resistor is external to the chip. The system includes an external capacitor coupled to the pin, where the external capacitor is external to the chip.
Relaxation oscillator with overshoot error integration
A relaxation oscillator can provide a smaller and cheaper alternative to a crystal oscillator circuit in a wide variety of applications. A sawtooth relaxation oscillator can include overshoot error integration. Separate and distinct oscillator capacitor charging, overshoot error integration, and reset phases can be provided using separate comparators for first and second oscillation capacitors. Potential advantages can include high accuracy high-frequency clock, convenient trimming during initial calibration, clock frequency stability over temperature and time, fast startup with low overshoot, high power supply rejection, low power, or low noise/jitter. The oscillator can charge an oscillation capacitor up to a target voltage, then interrupt charging before beginning an error integration phase that adjusts the target voltage by integrating an overshoot error of a voltage on the oscillation capacitor. After completing the overshoot error integration, the voltage on the oscillation capacitor can be reset. The techniques described are believed to be capable of improving clock frequency accuracy and other characteristics.
Relaxation oscillator with overshoot error integration
A relaxation oscillator can provide a smaller and cheaper alternative to a crystal oscillator circuit in a wide variety of applications. A sawtooth relaxation oscillator can include overshoot error integration. Separate and distinct oscillator capacitor charging, overshoot error integration, and reset phases can be provided using separate comparators for first and second oscillation capacitors. Potential advantages can include high accuracy high-frequency clock, convenient trimming during initial calibration, clock frequency stability over temperature and time, fast startup with low overshoot, high power supply rejection, low power, or low noise/jitter. The oscillator can charge an oscillation capacitor up to a target voltage, then interrupt charging before beginning an error integration phase that adjusts the target voltage by integrating an overshoot error of a voltage on the oscillation capacitor. After completing the overshoot error integration, the voltage on the oscillation capacitor can be reset. The techniques described are believed to be capable of improving clock frequency accuracy and other characteristics.
Hybrid RC/crystal oscillator
An oscillator includes a tunable oscillator, a phase detector circuit communicatively coupled with an output of the tunable oscillator and an input to the oscillator, and an oscillator controller circuit configured to adjust frequency of the tunable oscillator based upon phase detection between output of the tunable oscillator and output of an external resonant element received at the input to the oscillator.
Hybrid RC/crystal oscillator
An oscillator includes a tunable oscillator, a phase detector circuit communicatively coupled with an output of the tunable oscillator and an input to the oscillator, and an oscillator controller circuit configured to adjust frequency of the tunable oscillator based upon phase detection between output of the tunable oscillator and output of an external resonant element received at the input to the oscillator.
RING VOLTAGE-CONTROLLED OSCILLATOR AND PHASE-LOCKED LOOP
A ring voltage control oscillator includes: a conversion unit (100), cascaded multistage delay units (200) and cascaded multistage isolation buffer units (300). The conversion unit (100) receives a voltage signal controlled by the external, converts the voltage signal into a current signal and respectively transmits the current signal to a plurality of delay units (200) and a plurality of isolation buffer units (300). The delay unit (200) comprises two signal input terminals and two signal output terminals; the isolation buffer unit (300) comprises two signal input terminals and two signal output terminals; a first signal input terminal and a second signal input terminal of the isolation buffer unit (300) are correspondingly connected to a first signal output terminal and a second signal output terminal of the same stage of the delay unit (200), respectively; clock signals outputted by first signal output terminals of two adjacent stages of the isolation buffering units (300) have the same phase difference; clock signals outputted by the second signal output terminals of two adjacent stages of the isolation buffering units (300) have the same phase difference.